Research And Design On Four Channels Eight Outputs Radio Science Receiver

Digital science receiver plays an important role in DSN(Deep Space Network).The receiver is in charge of receiving signal from aircrafts and process or store signal for further processing.After analyzing data from aircrafts,the speed and location information can in turn help navigate and locate the aircrafts.It is necessary to design a receiver with multi-input and multi-output to satisfy the need of observing several aircrafts or stars.This paper first investigates the work of digital receiver design in various units both in our country and abroad.Based on the software radio framework,a digital receiver consisting of an analog-to-digital converter board,a high-speed digital signal processing board and a system control board is designed.The first work focused on designing the digital processing core board based on Kintex-7 FPGA chip.The advantage of Kintex-7 series FPGA chips are higher signal processing scale and lower power consumption.Then high-speed serial interface was utilized to expand fiber transmission and PCI-E data transmission.Based on the signal processing board,the digital logic part of the FPGA is completed,which mainly includes the input tapping module,the data selection module,the mixing module,the down sampling module,the parameter transmitting module and the Ethernet transmission module.Down conversion,down sampling and transmission tasks of the input signal are realized with the digital processing module.Secondly,the software system of the new generation receiver is designed.The software system is based on C/S architecture(Client/Server),which consists of user layer,service layer and driver layer.The bus communication part and the host computer software are designed.The bus communication part is based on the TCP/IP protocol,and the FPGA is mapped into a piece of virtual memory of the ARM,and the parameter information required by the FPGA and the state information of the feedback system are transmitted through the bus.The host computer software is designed in Python language.Firstly,the PYQT5 library function is used to complete the user interface design.It provides a good human-computer interaction interface.Users can implement program download,parameter configuration,status read back and data storage through this interface.Then the design of the automatic calculation algorithm of the down-conversion frequency is completed in the host computer software.The four-channel input and eight-channel output digital processing system for arbitrary data flow can be realized by cooperating with the internal data selector of the digital logic part.The last part is the digital science receiver test,which completes the test of system input characteristics,frequency setting and channel consistency.The final aggregated indicator results show that the new generation receiver meet the requirements.