| In the accelerator system,the quality of the accelerator beam is directly determined by the output performance of the power source,so the power controller has a very important ground in the accelerator system.Meanwhile,with the planning and design of High Intensity Heavy-ion Accelerator Facility(HIAF),the output performance of the accelerator power controller and the coordination work between the controller group are getting higher and higher.In traditional controller design,many excellent control algorithms cannot be used due to the limitations of digital device performance.However,with the development of digital technology and integrated circuits,many highperformance digital devices have emerged,which have powerful digital signal processing functions.This makes the algorithm that used to be implemented by a computer in the past can now be realized on a digital device,making the design of a high-performance accelerator power controller possible.Aiming at the design issue of high-performance accelerator power controller,this paper designs an intelligent optimization algorithm-based digital controller of accelerator magnet power by using FPGA,DSP and biogeographic optimization algorithm(BBO).Firstly,for the traditional Cooler Storage Ring of the Heavy Ion Research Facility in Lanzhou,this paper proposes a bus-based modular controller design architecture to improve the reasonable utilization of digital devices by the power control loop.For the FPGA system design architecture of HIRFL’s existing power controllers,there are problems of wasted logic resources and chaotic internal logic modularization,resulting in limited scalability of FPGA functions.To handle this problem,a modular design architecture based on bus is proposed in this paper.Experiments show that the proposed architecture greatly improves the resource utilization rate of control logic for digital devices and reduces the development cycle.Then,this paper simulates and analyzes the power controller based on intelligent optimization algorithm.First,the BBO algorithm is improved,and a BBO algorithm based on the overall migration strategy is proposed,which effectively reduces the running time and memory of the algorithm.Then use mathematical modeling method to obtain the mathematical model of the power supply prototype,and prove the feasibility of using the BBO algorithm to adjust the power supply controller PI parameters through simulation experiments.Finally,the BBO algorithm is implemented in the digital device DSP.Experiments prove that the BBO algorithm can be implemented in the digital device.Finally,this article uses the proposed architecture and uses FPGA + DSP digital devices to design an accelerator digital power controller based on BBO.The design completes the entire power controller hardware and software,tests the controller on the power prototype,verifies the practicability and effectiveness of the designed controller,and proves its application prospect in the future power controller. |