Research On Single Event Effect Simulation Method For On-board Computer System

On-board computers are the core components of all kinds of spacecraft.Due to operating in space,microelectronic devices in on-board computers are easily affected by single event effect,making their reliability problems particularly acute.Limited by experimental funds,experimental cycles and other factors,radiation experiments are difficult to be used alone as a means of verification for assessing the radiation resistance of on-board computers.Computer simulation technology can simulate the interaction of high-energy particles and chips at higher precision,which is significant for studying the mechanism of single event effect in the circuit and evaluating the single event effect resistance of the circuit.This paper relies on the pre-research project of equipment in the 13 th five-year plan,"Research on simulation technology of XXX single event effect",evaluating the single event effect resistance of the on-board computer and studying the single event effect simulation method.Aiming at the on-board computer system's structure and function,this paper studies its simulation method,model construction and sensitivity analysis of single event effect.The main research contents and results of this paper are as follows:(1)A single event effect simulation method for large-scale digital circuit systems is implemented.In the SMIC 130 nm CMOS technology,a single event fault injection model at SPICE level is formed based on the device-level single event effect response current.Through the simulation analysis of logic gates,the single event effect sensitive nodes of different logic gates are obtained.A single event effect fault injection,simulation and result detection method for large-scale digital logic circuit at SPICE level is implemented.At the same time,a means of segmentation simulation is proposed,which greatly reduces the simulation time of statistical analysis.The single event effect simulation method not only considers the device-level information,but also takes into account the circuit scale and simulation speed,which solves some of shortcomings of the existing methods.(2)The SPICE model of the on-board computer system is built.According to the composition of the core system of the on-board computer,the SPICE models of the processor and SRAM are built in SMIC 130 nm CMOS technology.Based on matrix multiplication and bubble sorting,the functional verification and timing verification of the on-board computer system are carried out,verifying the correctness of the system model at SPICE level.The simulation results show that the SPICE model of the on-board computer system can correctly initialize and execute at 100 MHz.(3)The single event effect simulation analysis of each module of the on-board computer system is completed.Through doing simulation statistics for the probability of system error caused by each module and taking into account the ratio of module area,the single event effect sensitivities of integer processing unit,register file,cache control module,AHB bus arbiter,storage control module and SRAM are obtained.The simulation results of integer processing unit show that in the five-stage pipeline,the single event effect of the fetching stage is the most sensitive.The results are significant for the design of process pipeline for single event effect reinforcement.The simulation results of SRAM show that the single event effect sensitivity of the instruction SRAM is about 10 times that of the data SRAM.At the same time,the single event effect in the instruction SRAM is more likely to cause errors in the operating state of the system,while the single event effect in the data SRAM causes more errors in the operating result of the system.(4)In the case of running matrix multiplication and bubble sorting procedures,the single event effect sensitivity of the instruction SRAM is 19.13? and 6.55?,respectively,which is the most sensitive module for single event effect in the on-board computer system.The module-level three-mode redundancy reinforcement design is applied to the instruction SRAM,and the single-particle effect sensitivity simulation analysis is performed on the reinforced system for the problem that single particles penetrate multiple chips at the same time.No errors occurred in the system by 1000 single event effect fault injections and simulations.The results verify that the module-level three-mode redundant reinforcement design is effective,and that the simulation method can be used to verify the effect of the system's radiation-resistant reinforcement design.