Font Size: a A A

Research Of Efficient Pulse Compression System Based On FPGA

Posted on:2019-07-28Degree:MasterType:Thesis
Country:ChinaCandidate:X TongFull Text:PDF
GTID:2382330596951735Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
In the space environment,the radiation environment of the processor can cause serious radiation effects,in order to improve the reliability of the processor system,the demage caused by the radiation effect is reduced.Before the spacecraft is in orbit,the low grade key devices should be screened and carried out SEU protection design.The high performance device makes the processor system have the advantages of fast operation speed,high performance and application software.FPGA and the analog to digitial converter is the key component of the system,its quality directly affects the whole system index.The SRAM FPGA is characterized by its programmable,high integration,low power consumption and fast speed,etc,having extremely important status in high speed data acquisition,system control and other aspects have extremely important status.However,due to the limited technical level of chip manufacturing in China and the restriction of the US embargo policy,it is difficult to obtain the domestic military grade and astronautic chip,which is expensive.Because of its low cost and easy access,commercial devices have great application prospect in satellite system.Therefore,how to choose the high reliability for the space radiation environment,the high performance commercial devices FPGA,AD,DA,is a challenging task.In this paper,the upgrade test of commercial plastic device in space radiation environment is studied,then an anti-irradiation testing system was designed based on the anti-irradiation test scheme of commercial components,the system can be used for remote control and circuit configuration updating,it can provide useful design reference for the COTS device circuit working in the space environment,reducing the complexity of testing.At last,the key FPGA software module of the spaceborne processor is designed for SEU,and a reliable and effective SEU protection method is studied:DMR-CED.In this paper,the fault tolerant scheme is verified by simulation error test.It is proved that the DMR-CED fault-tolerant method can achieve fault-tolerance while the TMR has the advantage of saving resources.Through the research of screening test on COTS and SEU protection design,providing a reference for the anti-irradiation design of high performance commercial devices and providing reference for future commercial devices.
Keywords/Search Tags:COTS, Space radiation, Anti-irradiation testing system, SEU protection design
PDF Full Text Request
Related items