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Research On Technology Of Digital Phase-locked Drive And Detection For Silicon Oscillating Accelerometer

Posted on:2019-10-26Degree:MasterType:Thesis
Country:ChinaCandidate:L H HuangFull Text:PDF
GTID:2382330596461353Subject:Instrumentation engineering
Abstract/Summary:PDF Full Text Request
The silicon oscillating accelerometer(SOA)which is a new type of accelerometer,has advantages of small size,low power consumption and low cost.Compared with the silicon capacitance accelerometer,it has a potential of higher precision.Therefore,SOA has significant application value and broad prospects in civilian and military fields.To solve problems of bad noise,poor flexibility and needing frequency measurement device in SOA analog measurement circuit,a digital phase-locked driving and controlling circuit is designed in this thesis.Taken SOA developed in our laboratory,research work includes:(1)Start from analysis of the basic principle of silicon oscillating accelerometer,dynamic model of resonator,electrostatic drive and detection circuit of sensitive capacitance,this article designs the system structure of accelerometer digital phase-locked driving closed-loop.(2)With analyzed the phase-locked loop(PLL)model in phase control loop and discussed influence factors of performance of PLL in detail,this article designs a digital phased-locked loop according to the signal characteristic of accelerometer.The simulation result of PLL and the accelerometer closed-loop system verify previous design.(3)A synchronous integrator circuit is proposed for phase detection and amplitude detection aim at the sense signal.The increase order of integrator is beneficial to improve noise suppression performance and reduces signal sampling rate.An incremental PI controller was designed and achieved in form of a state machine.The noise level of numerically controlled oscillator(NCO)output signal is estimated.After FPGA and other circuit device selection and hardware design,the whole accelerometer is developed and completed.(4)Temperature compensation methods which commonly used in silicon oscillating accelerometer are discussed briefly.According to the temperature sensitivity of silicon's Young's modulus,a frequency square sum compensation model is built in FPGA,Achieved real-time temperature compensation.The result of static experiment at room temperature shows the effect of this compensation method is significant,which the stability of zero bias enhanced obviously.(5)Test results show a good short-term stability of synchronous integrator and NCO.Test result of Frequency control word readout with real signal shows their same trend.The scale factor,scale factor stability,zero bias,zero bias stability and Speed random walk results also represent the accelerometer has a good static performance.The digital phase-locked driving and controlling circuit presented in this article achieved loop-control,frequency measurement and temperature compensation function in a single FPGA chip.It has important significance for promoting digitization of SOA circuit and improving the performance.
Keywords/Search Tags:Silicon oscillating accelerometer, Phase-locked loop, FPGA, Synchronous integrator
PDF Full Text Request
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