Design And Implementation Of Radar Receiving Measurement System Based On PXIE Bus

With the rapid development of technology,higher requirements have been placed on some electronic measurement technologies.At present,measurement systems based on various test buses have been widely used in the field of electronic measurement.Nowadays,the measurement system is a must-have device for the research and production of electronic products due to its complete functions,flexibility and variety.In the scientific research work,it is necessary to qualitatively understand the signal.The measurement system is the basic work to realize the measurement and analysis of the signal,so the development of the high performance measurement system has very high practical value.Since radar data analysis requires real-time performance,high requirements are placed on data transmission.The PXI Express bus is an extension of the PCI Express bus in the instrument field,which can speed up data transmission,especially its transmission mode,that is,end-to-end transmission mode,which can more effectively improve data transmission efficiency.Therefore,the thesis develops the design and implementation of radar receiving and measuring system based on PXIE bus.The thesis firstly takes the test and analysis requirements of the current radar measurement system as the starting point,mainly focusing on the design of the transmission interface and the radar signal analysis module.In general,based on the function of the measurement system and the requirements of the technical indicators,the overall design scheme of the radar receiving and measuring system based on PXIE bus is proposed.Mainly using the modular idea,the whole system is divided into different modules according to different functions,which are mainly divided into AD acquisition module,interface module,signal analysis module and display module.Among them,the AD acquisition module uses the ADS42LB69 chip as the core chip of the module to achieve dual channel sampling;The interface module uses the PCI Express Endpoint Block hard core Xilinx Virtex₇ series xc7v585tffg1761₁ FPGA chip to implement the PXIE transmission protocol,and on this basis,the DMA controller is designed to make the data transmission rate of the interface closer to the theory,value;The signal analysis module and display module are mainly realized by LABVIEW graphic language.Firstly,the analysis methods of time domain,frequency domain and modulation domain are introduced.Some analysis algorithms used by each module are introduced.Then,based on these analysis methods,the analysis of time domain,frequency domain and modulation domain is realized.Second,test and verify each module and system.The test result of the interface module indicates the correctness of the data transmitted by the PXIE interface and the stability of the data transmission rate of the PXIE interface,that is the data transmission rate of the PXIE interface is greater than 1 GB/s,which satisfies the design requirements;The signal analysis module test results verify the correctness and stability of the signal analysis module.The test results of the system indicate whether the indicators of the whole system meet the requirements of the system.Finally,summary of the work done in the thesis,and gives some shortcomings in the design,and gives the next step how to continue to improve.