Highly Reliable Spaceborne JPEG-LS Image Compression Hardware System Design

In recent years,deep space exploration activities of human beings have become more and more frequent.With the clarity and diversity of targets for deep space exploration missions,spaceborne systems have played an even more important role in the entire exploration activity.A highly reliable spaceborne system The application of the program is of crucial importance to the detection project.In general,the acquisition and transmission of images is an important method and approach for obtaining information.There is a certain correlation between the amount of data generated during image acquisition and the amount of information.In order to obtain more information from the image,it often leads to a rapid increase in the amount of data,which results in a more significant contradiction between the limited hardware resources and the large amount of data in deep space exploration.Therefore,using an efficient image compression algorithm can effectively alleviate the current contradiction.At the same time,in the deep space environment,due to the existence of the irradiation effect,the electronic system is susceptible to the single-particle effect due to the single-particle effect,which seriously affects the normal function of the system and even leads to system defects.The paper is mainly developed from the following two parts.1.The JPEG-LS image compression algorithm has low complexity,and can achieve high-efficiency image compression at the same time.With these two points,the algorithm can well meet the needs of deep-space detection.At the same time,it saves the hardware system's resource overhead.In this paper,based on the requirements of a deep space exploration satellite model task,based on JPEG-LS image compression algorithm,a complete high-reliability image and data processing FPGA system is designed using Xilinx Virtex-2 chip platform.In the entire digital system,the image encoder determines the overall operating speed of the system.The design is mainly based on the traditional algorithm,the following optimization: the prediction error part,the cache of the row data,Golomb encoding is optimized,and some are removed Unnecessary parameters.2.For the monotonic effect problem,the internal structure and working principle of the Xilinx FPGA are simply introduced.Then the mechanism of the single-event effect is analyzed from the perspective of the components.The radiation-resistance and fault-tolerance technologies based on the SRAM FPGA are studied.This paper designs redundancy measures(three-mode redundancy design),single-frame independent processing methods,image source exception fault-tolerant processing methods and other reliability measures.Among them,the three-mode redundancy method adopts an improved XTMR implementation scheme,which effectively avoids the defects of the conventional TMR scheme;a single-frame independent technology is a logic circuit that generates a reset signal after each frame image processing ends,and initializes the system and coding state,In order to avoid the accumulation of error conditions;Image source exception handling is the validity of the input system image and specification detection,to avoid invalid image input.The test part of the design,in addition to the function and timing test of the system,also includes the validation of the validity of the reliability design,the design of the system test platform,simulation and test of the system through the functional simulation and timing simulation of the single-event flip The validity and effectiveness of the anomaly detection of image sources.The test results show that this design satisfies the requirement of functions,performance,resource occupation,and reliability.