| With the increasing demand for information control and transmission of high-speed trains in China,the structure of the train communication network is gradually complex,and the amount of data that needed to be stored and transmitted is also increasing rapidly.The traditional train communication network(TCN)has gradually been unable to meet the requirements of data control and transmission in a specific environment.But Ethernet has obvious advantages in transmission rate and network bandwidth,so how to apply it to train communication network is the key research direction.The research content of this article is based on the “Recommended Train Communication Technology R&D” project,using Altera’s Cyclone V SOC chip to design and develop a hardware experiment board,and verify its key technologies(interruption technology,DMA transmission technology,etc.)to provide technical support for the implementation of the back ETB protocol.The software development adopts ARM DS-5(V14.1)integrated development platform and uses C language for programming.The communication protocol adopts the "IEC 61375-2-5" protocol of the Ethernet Train Backbone,which was promulgated in 2014.After careful study of the ETB protocol,the inauguration,routine operation and communication reconnection function of the train network are realized,and on this basis,the real-time performance and completion of the data transmission are guaranteed.This article according to the overall needs of the train reconnection communication project,combined with the ETB system network structure,design using FPGA,HPS and CPU hardware architecture to achieve the project.The HPS function module mainly provides interfaces at the data link layer,network layer,transport layer,and the application layer.It implements the Train Topology Discovery Protocol(TTDP)at the train inauguration to complete the establishment of the physical topology and the logical topology,as well as the ETBN node and CN network addressing.The data exchange function and the processing functions of the five types of data are completed during the normal operation stage of the train.The node detection and anomaly detection capabilities are also available to realize the reconnection communication function of the train.Combined with the ETB protocol,it mainly completes the inauguration module design,interface module design,frame processing module design,and reconnection module design.The project design and key technologies have been verified to meet the requirements of the project.The relevant module programming has been basically completed.The joint test of FPGA and HPS shows that the communication system can operate normally and all the functional modules can meet the requirements. |