Design And Implementation The PHY Of TX For USB PD 3.0 System

At present,the storage capacity of unit volume lithium battery has almost reached the limit,and the battery capacity has little room for further development,in order to meet people’s charging needs,shorten the charging time,and be compatible with various fast charging technologies on the market,reduce the number of adapters,also to protect the environment,USB-IF defines the Type-C Cable,Connector Specification and USB Power Delivery Specification in the USB 3.1 standards,which solves these problems well.The PD Specification can transmit up to 100 W of power through the USB interface.When the charging current between devices is greater than 3A using Type-C interface,the plug of the USB cable needs to be embedded in the E-Mark chip to ensure that the cable has the ability to delivery a large current and also to ensure the safety of charging.The chip provides the cable current transmission capability,data transmission capabilities,manufacturers Defined ID and other information.This paper designs TX transmission of the E-Mark chip that supports PD 3.0.The specification has strict requirements on the slope of the output signal and the range of the output high and low levels.Also limits the range of the output impedance at the Nyquist frequency of the TX part of the circuit.According to the requirements of the PD Specification for the TX part of the physical layer,we find that the design focuses on: First,the control of the slope of the output waveform,ie,control the rising and falling time of the output waveform;Second,it is necessary to convert the input signal voltage of 0-5.5V into the output signal voltage of 0-1.12V;Third,the output impedance of the circuit is controlled;Fourth,in the case of different load and output voltage,the inflow and outflow current of PMOS and NMOS at the output terminal is different.Vanguard 150 nm CMOS process is used to implement the design of schematic and layout.The requirements of the slope and driving ability of the output waveform are divided into two parts,and a capacitor is added to the circuit to adjust the rise and fall times of the output signal.After the design is completed,each corner of the circuit is subjected to simulation,the indicators are found to meet the requirements of the agreement,leaving some margin.