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Research And Implementation Of Adaptive Single-pulse Algorithm For Digital Array Antenna

Posted on:2018-07-30Degree:MasterType:Thesis
Country:ChinaCandidate:X LiFull Text:PDF
GTID:2358330512478580Subject:Electromagnetic field and microwave technology
Abstract/Summary:PDF Full Text Request
Fast target detection and tracking in a complex electromagnetic environment is a primary concern for radar system designing and equipping in the future.Digital array radars(DARs)is capable of spatial jamming suppression by means of adaptive beamforming techniques.Based on DARs,an array antenna modeling method and a quad-channel rapid adaptive monopulse algorithm are studied in this paper for fast and accurate target direction estimation in mainlobe and sidelobe jamming.A 96-channel IF sampling and DBF processing hardware platform is implemented as per the technical requirements of a 2-dimensional DAR,and hardware testing and verification are also carried out on the platform.Related FPGA programing is accomplished according to system requirements,where dynamic partial reconfiguration is adopted to reduce logic resource and power consumption.The main contents of this paper are listed as follows:1.A uniform linear array(ULA)based analysis for mutual coupling effect on antenna patterns of array antennas is carried out.It is concluded that offline HFSS simulation results can be used for fast and precise pattern approximation of ULA antennas.2.A quad-channel adaptive monopulse algortithm based on dimension reduction is studied in the paper.Combined with mainlobe maintenance techniques and adaptive jamming suppression,the proposed algorithm works well with square grided planar array antennas.An effective mainlobe maintenance technique is introduced in the paper,where direction of jamming is not required.3.A 96-channel beamforming hardware platform is designed in the paper,which is capable of simultaneous multi-channel sampling and synchronization.Xilinx Virtex-7 FPGA and a high-performance octa-core DSP is applied in this platform.Schematic and PCB designing of power circuits,clocking circuits and data processing circuits etc.are considerately optimized and verified.Functional modules in Virtex-7 FPGA are also verified and prove to work correctly.
Keywords/Search Tags:Array antennas, Mutual coupling, Adaptive monopulse, Multi-channel DBF processor
PDF Full Text Request
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