Research And Design Of A Buck DC-DC Circuit Based On Exponential Slope Compensation Technology

In the field of power management,Switch mode power supply(SMPS)with high efficiency has been widely used,DC-DC chip is a example of which.now DC-DC chips usually have two kinds of control technology,the current control mode and voltage control mode,voltage control mode usually has high gain,but the transient response speed is slow,and which is too difficult to compensate,in order to solve the above problems,the current mode with fast transient response speed is used to rapid these shortcomings,the peak current control mode is a usual example of which.In this manner,the sampling slope directly from the inductor current,so the circuit is eseay to be interfered,when the duty ratio is greater than 50%,the interference is constantly enlarged,resulting in the sub harmonic oscillation.This thesis analyzes the reasons of peak current mode carefully,Ridley model shows that the generation of sub harmonic oscillation due to the poles result from the sample and hold itself in 1/2 switching frequency,which will cause the gain in Potter plots increase at 1/2 switching frequency,if the quality factor is too high and the circuit is too weak to restrain the conjugate poles,the gain would increase to more than 0dB,which leads to the sub harmonic oscillation,that means even if the duty ratio is less than 50%,in the circuit with high quality factor,the sub harmonic oscillation is still difficult to avoid.In order to solve the problem,usually join voltage mode in the sampling process,this kind of method is called slope compensation technology,in the complex application of today's DC-DC chip,single compensation slope is difficult to meet the performance requirement,such as it is difficult to provide sufficient compensation slope at high duty ratio or limit output power and the speed of transient response at low duty ratio,in order to solve this problem,this paper designs an exponential slope compensation circuit based on BUCK DC-DC,which provides smaller compensation slope at low duty ratio,maximize the advantages of current loop,while the the duty cycle increasing,which will increase slope compensation to ensure the circuit has enough stability.At the same time,this paper also carries out other BUCK loop design,such as adding internal and external compensation circuit in the loop,the compensative Microelectronic Devices in the compensation circuit are integrated on the chip in internal compensation circuit without the buffer,the loop has faster response,external compensation circuit for different applications uses external compensation circuit,but buffer filter is added,which can expand the chip application.In this paper,the 0.35?m BCD process,Cadence Spectre and Hspice are used to simulate.Under the condition that the converter inputs 3.3V and duty ratio is 66%,the voltage slope of slope compensation shows exponential change,which proves the validity of the designed circuit.The output current of the power supply can reach 7A,and the efficiency can reach 93% under 7A load current.In forced continuous mode,the overshoot or undershoot caused by the sudden change of the load from 10 mA to the 7A is not more than 70 mV,the transient response time is less than 50?s.