The Optimization Of Error Floors And Design Of Reconfigurable Layered Decoders For LDPC Codes

Due to its outstanding ability to be able to realize near Shannon limit channel capacity,the Low-Density Parity-Check(LDPC)code has been broadly applied in many communication systems.Recently,the LDPC code has been selected by the 3GPP as the moderate-and long-code coding scheme in fifth-generation mobile communications(5G).However,the inherent error-floor characteristic of the LDPC codes limits its application in 5G,due to the requirements of high reliability,various capability,extremely-low delay and very-high throughput.To address this,the following researches are conducted in this thesis.First,to address the error-floor problem of LDPC codes,this thesis proposes a novel bit-recovery scheme for LDPC codes,which is based on bit-searching and check-node-addition algorithms.The most erroneous and most reliable bits are first located by searching the codewords.Then,the reliable bits transmit the correct information to the bits prone to be wrongly decoded,which is accomplished by connecting the bits via adding new check nodes.Using the bit-recovery algorithms,the trapping sets could be broken by recovering the erroneous bits in the trapping sets.After this,the negative effects of the trapping set are eliminated,and the BER performance and error floors are further improved.Rather than directly discussing on the complicated trapping sets,the proposed algorithm utilizes the Monte-Carlo simulation to locate the most erroneous and reliable bits.This method is reasonable because the most erroneous bits are always included in the trapping sets.By this way,the complexity is greatly lowered without knowing the detailed information of the trapping sets.Moreover,the number of checking nodes can be selected optionally according to the different code-length requirements,which increases the flexibility of the algorithm.Second,the next-generation mobile communications require high reliability,various capability,extremely-low delay and very-high throughput.To address the four aspects,this thesis introduces TDMP decoding algorithm to improve the reliability.Then a reconfigurable-layered-decoder structure is designed for the compatibility with various code lengths and rates.Finally,the optimization for improving the pipeline efficiency and the structure of double-channel QC-LDPC decoder are proposed,which contributes to the high throughput in the next-generation mobile communications.