Study On The Performance Of Dual-Frequency CMOS Terahertz Detector And Array Detectors

Terahertz technology has wide application prospects in security imaging,nondestructive testing,radar detection,biological medical treatment and so on.As the core device of terahertz technology,terahertz detector has been widely concerned by the scientific community and the industry.Commonly used terahertz detectors at room temperature include Microcalorimeter,Gaul detector,Pyroelectric detector and Schottky diode.These detectors have many disadvantages,such as expensive processing cost,complex technology and limited integration,which greatly restrict its wide application in the above field,Silicon based terahertz detector designed by standard integrated circuit technology has the advantages of low cost,fast response speed,high integration and easy to mass production.It is a new way to realize miniaturization and highly integrated room temperature terahertz detector.This dissertation combining the existing research results,fabricated and characterized two detectors based on 0.18?m CMOS process.First is a dual-frequency terahertz detector include a pair of bowtie structures implemented on silicon-layer and meta-layer materials.Second is a 1×16 CMOS terahertz detector array integrated SPR antennas.The main results include three aspects:1.The feasibility of dual-frequency terahertz detector is verified from theory and experiment.The performance characterization shows that,the response sensitivity RV of the antenna at working band 220GHz and 650GHz is 2kV/W and 0.45kV/W respectively;the noise is 60nV/Hz0.5 when the modulation frequency is 1KHz;the noise equivalent power NEP is 26pW/Hz0.5 and 120 pW/Hz0.5 respectively.2.Each pixel unit of the 1×16 CMOS terahertz detector array include a SPR antenna working at the frequency of 650GHz,a excellent performance asymmetric MOSFET sensor and a low noise operational amplifier with the closed-loop gain of 40dB.The response sensitivity(Ry)and the noise equivalent power(NEP)of each detector in the array are measured experimentally.The results show that when the bias voltage of the gate source of the transistor is 0.45V,the standard difference coefficient of the response sensitivity(V(RV))and the noise equivalent power(V(NEP))are 17.46%and 22.47%respectively.Obviously,the performance of detector array has reduced by the crosstalk between antennas.3.The cause of crosstalk of detector array is explored through the simulation experiments by the Ansys HFSS software.It is found that the transmission of the high frequency signal in the substrate Si is the important factor contributes to the crosstalk.By isolating the substrate and antenna or reducing the thickness of Si substrate,the crosstalk can be effectively reduced to ensure the uniformity of each pixel.