Cyclic Shift Keying Spread Spectrum UWA Communication Use Chaos And Data Acquisition System

With the development of Marine science and technology,underwater signal processing technology is becoming more and more important and widely used in underwater positioning,information countermeasure and other fields.Beyond that higher requirements were put forward on underwater signal processing technology.To research and development a certain reliability and security of underwater acoustic signal processing platform has a vital significance.This paper firstly puts forward the basic principle of chaos theory,then analyses several common characteristics of chaotic sequence.Put forward to a plan that replace the PN code of spread spectrum system with cascade chaotic sequence.In this way,more sequences could be used in the spread spectrum system.For the reason of improving communication rate,this paper introduces a way of Chaotic cycle shift keying spread spectrum coding.But this coding is sensitive to the multipath interference.To solve this problem,this paper propose an advanced plan of time reversed chaotic cycle shift keying spread spectrum coding to enhance the system.In the second part of this paper,an acquisition system is designed according to the working parameter of time reversed chaotic cycle shift keying spread spectrum system.The function of the acquisition system is transforming analog signal to digital signal and transmitting data to the computer through the USB port.Data update to the computer will be stored in a certain format.Controller of the acquisition system is a FPGA chip,a high speed8-channel ADS8548 chip is used to work with it.A SRAM chip is used for data cache on the acquisition circuit.There is a user interface on the computer to display data and control the data transmitting.In the last part of this paper,some result of test on the time reversed chaotic cycle shift keying spread spectrum system is introduced.The system realizes most expected function.Through decoding on the computer,the system has a low BER.There is more research need to be done to realize real time system by writing algorithm on FPGA in the future.