Design Of M-BUS Terminal Transceiver Chip

With the development of our country's modernization construction,the smart metering system has been widely used.Meter-bus,namely M-BUS,is a kind of special bus technology for the smart metering system with remote power supply.It not only saves a lot of cost,reduces the difficulty of wiring,and increases the safety stability of the smart metering system.In addition M-BUS also has high-speed stable communication,low static power consumption,big access site capacity,the common twisted pair for use,strong anti-jamming capability,arbitrary bus topology and many other characteristics.Therefore it sets aside a variety of communication protocols,application extension is extremely convenient.In this thesis a terminal transceiver chip is designed based on M-BUS protocol.This chip realizes signal communication between master and slave stations by voltage and current modulation,including the receiving and sending functions independently.The receiving module transforms voltage signals which the master station sends on M-BUS to TTL signals which are sent to slave station;the sending module transforms TTL signals which are input by the slave station to current pulse signals which are sent to the master station.The receiving module consists of an ampling keeping circuit,a hysteresis comparator,an output driving circuit and a logic control circuit;the sending module consists of a logic input circuit,a constant current source circuit and a voltage reference circuit.In the receiving module the hysteresis comparator is applied to reduce noise interference,a dynamic reference voltage is introduced to improve the signal range and Darlington transistors are used to further improve the output driving ability.In the sending module current-limited inverters are applied to match the logic of slave station,a frequency compensation technology of zero-pole cancellation is introduced to improve the bandwidth of the constant current source to reduce setup time and turn-off time,and a trimming circuit is used to improve the precision of the voltage reference circuit.Based on Korea Dongbu 0.35?m BCD process,the designed circuits are simulated and verified with the Cadence platform.The test result of the designed circuits as follows.The communication rate is 38.4 kbps,the bus current is 6.9mA,the quiescent current is 946?A,the threshold of the receiving module is VMark-6.8V,the hysteresis voltage is 106mV,the dynamic reference voltage is VMark-9.7V,the charging current of the sampling capacitor is 24.7?A,the discharging current of the sampling capacitor is 0.5?A,the transmission delay of the receiving module is 0.675?s,the setup time of the constant current source is 1.2?s,the turn-off time of the constant current source is 0.08?s.Finally the leakage phenomenon caused by the latch effect during the measurement would be analyzed further,and the improvement program will be suggested in the following working.