Design Of Digital Automatic Gain Control And DC-offset Compensation Circuit In Zero IF Receiver

Zero IF receiver with the characteristic of high integration,simple structure and low power consumption,has been widely used in the wireless communication.However,long distance transmission,terrain and other factors will make the signal fluctuation,affecting the backend processing,and the DC-offset exists in the circuit,therefore,an automatic gain control and DC-offset compensation circuit is need to adjust system signal,eliminate DC-offset,reduce the bit error rate and improve the demodulation performance of the receiver.A digital automatic gain control and DC-offset compensation circuit are designed for zero IF receiver.The closed-loop structure and the logarithmic method are carried out to implement a digital automatic gain control with high dynamic range.The key modules of the digital automatic gain control includes digital amplifier,modulus calculation circuit,smoothing filter,power calculation circuit and error processing circuit.The nonlinear function is used to control the output power of the digital automatic gain control.At the same time,the negative feedback loop is used to achieve real-time digital DC-offset compensation circuit.On the premise of performance guarantee,the method of bit expanding is used to eliminate multiplication unit,reducing the resource consumption of circuit.The simulation results show that for the input signal with more than 60dB dynamic range,digital automatic gain control circuit can rapidly response,making the power of the output signal in the vicinity of OdBm;for the signal with 70mV DC-offset voltage,after passing the DC-offset compensation circuit,DC-offset voltage is less than 10mV.The FPGA verification platform is built to complete the FPGA verification of the digital automatic gain control and DC-offset compensation circuit.The verification results show that in the 3.84MHz clock,the digital automatic gain control can rapidly response to the change of the input signal,whose dynamic range is more than 60dB,the loop stability time is less than 1ms and fluctuation is less than 1dB.DC-offset compensation circuit can rapidly cancel the DC-offset voltage,making it less than lOmV.