Research Of Real-time Image Processing System Based On Embedded System

An embedded system is a device for assisting,monitoring and controlling equipment.It is equivalent to a dedicated computer system.The ZYNQ family is based on the Xilinx All Programmable So C architecture,These products integrate a feature-rich dual-core ARM Cortex and Xilinx programmable logic in a single device.This architecture of ZYNQ combines the advantages of FPGA and ARM,provides a new solution for the realization of embedded system,and plays an important role in the development of real-time image processing system.Synthetic Aperture Radar(SAR)is an important development in radar signal processing technology.SAR can get high-resolution images,and is not affected by various kinds of weather.It plays an important role in terrain detection,celestial observation,disaster prediction and national defense construction.The current SAR imaging real-time processor mainly includes the signal generation module,AD sampling module,algorithm processing module,display and control module and data storage module.Based on the embedded system,you can facilitate the rapid implementation of the real-time imaging processor.In particular,the new architecture of the ZYNQ family which contains FPGA and ARM has both advantages of these two chips,so that the design of the system becomes more flexible and reduces the development time.Using the embedded system to achieve the algorithm processing module has been conducted the through research,the main content of this article is about using the embedded system to complete the software part of the signal module,AD sampling module and display and control module.In this paper,we use the embedded chip ZYNQ instead of FPGA to complete the function of the module so that you can flexibly change the parameters of the PL logic part and this can greatly save the development time.The article includes the following content.First,the architecture,peripherals,interfaces and the interrupt system of ZYNQ chip is introduced and detailing the contents of the AXI protocol standard.Second,based on embedded system to generate linear-FM chirp waveform,the principle of the chirp signal is analyzed and the linear-FM signal is generated by the direct digital synthesis technique.The parameters of linear-FM chirp signal can be dynamically changed through the AXI_Lite interface.Third,in this part,the design of AD sampling module and interface in embedded system is studied,the data is sampled through analog-to-digital conversion chip AD9680 and clock chip AD9523.The JESD204 B interface between the sampling system and the logic module and cache the radar echo signal data is accomplished.By introducing connection relation between the sampling module and the subsequent modules in the processor,the display and control module is introduced.Last,this paper introduces the use of dual-core in embedded chip and completes the coordination and control of the whole system through the AMP architecture.Based on the AXI protocol,the DMA core is designed and the final result is transmitted to the computer through the network port of control module.Using the MFC platform to code terminal program,this terminal is used to complete the user's input and the control and display of the entire system.The last part introduces the communication between the host computer software and the chip and the final display of the results.