Research On QPSK Digital Demodulation Algorithm Based On FPGA

QPSK is a kind of modulation and demodulation scheme which is very common in communication domain.The algorithm has an advantages in anti-interference performance,and the band utilization rate is high,thus becoming the mainstream of the demodulation algorithm.What's more,the algorithm is simple for hardware implementation,therefore,it has been widely applied in the mobile,microwave,satellite communication,as well as cable TV,and other fields.As our country supports for integrated circuit's development vigorously,therefore,the "Chinese core" got rapid development,digital chip and semiconductor technology got rapid progress,too.As a kind of solution hardware platform integrated with multiple of the digital communication IP core,FPGA provides a good solution for the miniaturization of communication systems development.In this paper,number of QPSK demodulation algorithm were studied based on the above background,the main work are:(1)by deep analysis of communication system,compared the various demodulation algorithm,studied the working principle of QPSK,and then this paper put forward a demodulation algorithm structure,and the feasibility is verified in theory.(2)to formula derivation of plan,this paper use the MATLAB&Simulink simulation tools to establish modem system,and then carries on the simulation of various modules,verify the performance of the various modules;(3)after the simulation model of the system,using the Verilog hardware description language to describe each module function,utilizing the Modelsim software test function of every module,and carried on time analysis of functional modules,and then using the FPGA set up the hardware platform;(4)with the FPGA chip as the core,through the layout of the wiring to complete the construction of the hardware platform,and the program is loaded into the development board,finished the system debugging,and completed testing the work.In this paper,the bit-rate of data is 4Mbps,and the frequency of signal carrier is 20 MHz.under the condition of modulation noise less than 8 dB,bit error rate is lower than 0.005 for system testing,which proves the system has a good character of anti-jamming.It suggests that the system can meet the requirement of communication system,and has practical application significance.