Study On Design And Application Of Delay-based Physical Unclonable Function

Nowadays,the problem of hardware security has caused great concern among the chip designers.Illegal copy and distribution cause not only great economic loss but also the threat to the security of defense.On the other hand,encryption chips have been widely applied in various fields and they also face the threat of multiple side-channel attacks.Physical Unclonable Functions transforms the unexpected variations during fabrication such as threshold value,and channel length etc.to digital information at circuit level which can be regarded as unique identification of chips.So it is thought an ideal method to confront the security challenges for integrated circuits.It has become the one important security primitive.Field Programmable Gate Arrays have been used in a wide range of computing and embedded applications.They also need to be protected.Traditional methods for FPGA security all involved key storage on chip and they were vulnerable to many attacks.Physical unclonable function can be used to generate secret key for FPGA.This work proposed to use the look-up table shift register in FPGA to implement a delay-based PUF.It uses the randomness of the delay between two shift registers to generate bit ‘0' and ‘1'.This PUF only uses two SLICEs on FPGA to produce a 128-bit signature and it costs ultra-low resources in FPGA.Experimental results show that the PUF has good uniqueness and reliability under different environment.Scan chain design is widely used to improve the controllability and observability of integrated circuits.It also causes a threat of scan-based side-channel attack.Among existing countermeasures against scan-based side-channel attacks,the methods based on “lock and key” is an effective and popular method.For this method,a safe and correct key is needed to guarantee the security of correct key.In this work,it was proposed to apply PUF in the lock-and-key scheme.Shift register is reused for PUF key generation.The PUF key will be compared with the user key and the comparison result will be used to determine the working state of some selected scan cells so that the scan chain will work in an abnormal manner when the user key is incorrect.This countermeasure can not only resist existing scan-based side-channel attacks but also guarantee the security of the used key while just incurring negligible overhead and maintaining the original testability.This work not only implements a delay-based PUF for FPGA but also explores the application of PUF in secure scan design.As a security primitive,its unclonability,uniqueness and reliability indicate that PUF has a potentially wider application and more future work will focus on its application in hardware metering for IP protection.