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The Design And Manufacture On 10A/300V Junction Barrier Controlled Schottky Rectifier

Posted on:2017-01-28Degree:MasterType:Thesis
Country:ChinaCandidate:X Q ZhangFull Text:PDF
GTID:2348330518967198Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
Schottky rectifier controlled by Junction barrier is a new Schottky rectifier which uses the advantages of PN junction and Schottky rectifier tube,and can be made into a power rectifier tube of high back pressure,strong anti surge current high current,and high speed switching.The main content of this thesis is to design a JBS rectifier with a reverse breakdown voltage of 300 V and a forward current of 10 A.Based on the analysis of JBS theory,the JBS10A300 V products is wholly designed from the structure,layout,epitaxial materials,process parameters and electrical parameters of product process requirements,chip shape,reliability and so on.With two field limiting ring structure the depletion layer stack to improve the breakdown voltage of products.The circular Schottky design structure is adopted in the lithography layout,which can greatly increase the effective contact area of the barrier metal and reduce the forward VF.In process,considering the high requirements of VBR,the conditions of different boron annealing is at 1100 ?,1130 ?,1180 ? and 1200 ?,and VBR data are 200-264 V,280-340 V,340-450 V and junction short circuit,the final choice of annealing temperature of 1180 ? conditions is carried out.The VBR has reached the design requirement.The barrier metal using NiPt5 metal,taking into account the characteristics of the NiPt1 and Ni metal,the best forward and reverse characteristics is obtained.In this paper,the JBS10A300 V product design has been completed and expounds the basic principle and the condition parameters of production environment,production of the product process flow.Carried out according to the design requirements,through the production of silicon in different stages of electrical testing,product electrical parameters,reliability level reached the design requirements,ESD level from 6KV to 12 KV reached15KV.The electrical parameter level are VF: 0.781-0.856V@10A,IR:4-50.5uA@305V,VR:307.5-465.2V@0.2mA reached the expected design goals.The final product appearance and packaging graphics chip wafer diagram is given.
Keywords/Search Tags:Junction Barrier, Field Limiting Rings, Anti-Static Electricity
PDF Full Text Request
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