| With the industrial technology development,PLC has become the core component of industrial automation systems and has been the most important role in the industrial control layer.PLC has been recognized as the most reliable industrial control equipment.At present,more than 90% of China’s PLC market is occupied by foreign products,especially Siemens.They have an absolute advantage in the field of PLC.Since local PLC products are completely dependent on the core components of imports,we do not know whether the foreign CPU and operating system manufacturers have a back door.As a result,we can’t make sure about the safety and reliability.It’s very necessary to develop the domestic self-controllable PLC products by using the fully-built CPU and the domestic real-time embedded operation.In this background,this thesis proposes a multi-core CPU Research on Application of Industrial Control System.This project is derived from a research project of domestic PLC.Based on stability,reliability,safety cost and other factors,we chose the domestic high-performance SPARC multi-core processor S698 pm as the dedicated CPU of PLC.This thesis mainly studies the adaptation problem of domestic SPARC multi-core processor in domestic PLC,including the overall design of hardware and software,the important module description of hardware platform and the detailed design of software system.In the hardware part,the power function module,the reset function module,the storage system,the debugging function module and the communication system hardware design are briefly explained.In order to solve the adaption problem of SCOS and S698 pm quad-core processor,we proposed the master-slave software architecture based on multi-core processor in the software part and it has "independent compiler,independent operation" features.The software system mainly accomplishes the following work: In the core0,we accomplish the security operating system SCOS transplantation,according to onboard hardware resources,we complete the corresponding driver,such as network card,Space Wire,serial and other devices,and finally accomplish TFFS file system transplantation and complex interrupt management driver;in the core1,we build autonomous protocol stack code,which mainly includes implementation of the SPARC processor key trap processing assembly code,link script and makefile file;The hardware resources used by the two cores are assigned in the configuration file,including interrupt,peripheral resources and memory and other resource;The multi core data protection mechanism is realized by the spin lock or the interrupt between the cores to accomplish synchronization between the master and slave cores,and then accomplish the inter core communication based on shared memory.At the end of this thesis,a small PLC control environment is built.Through the test,we can conclude that the system is running normally,the platform works well and fully meets the needs of the project. |
