Investigation On The Influence Of Pre-polishing Process On Quality Of Large Size As-polished Wafers

Due to the sharply increasing demand of automotive electronics,consumer electronics and IoT(Internet of Things)markets,200mm silicon wafer's market steadily enlarge in demand.With the continuous reduction of feature size of the integrated circuit,the technical requirement of the 200mm wafer feature size gradually moves closer to the 300mm silicon wafer.The current feature size of 200mm silicon wafer is less than 0.13?m,so the flatness of silicon wafer has more stringent requirements.However,200mm silicon wafers are commonly using single-side polishing technology.To meet the more stringent flatness requirements,the technology still has a vast research space and research value.In this paper,the influence of pre-polishing process on the quality of polished wafer has been studied,and the surface fluctuation of the silicon wafer are characterized by various tools,such as the capacitive geometric parameter tester,the microscope and the profiler,analyzing the influence on the site flatness.The main experimental results are following:Experimental study on the effect of pre-polishing etching process on site flatness after polishing was carried out.The results show that different etching treatments produce different surface conditions,which can affect the subsequent polishing process and in turn affect the SFQR of polished wafers.The polished wafer's SFQR have a certain correlation with the TTV and TIR of as-etched wafers.The SFQR of the polished wafer is gradually deteriorated with the increase of the acid etching removal amount,and the rotation of the silicon wafer during the acid etching process has little effect on the polished wafer's SFQR.There is a big difference of silicon surface roughness between KOH caustic etching and NaOH caustic etching,but the distributional differences about SFQR of as-polished wafer are not obvious.After the polishing,the SFQR data is strongly influenced by the surface fluctuation state,and the surface fluctuation is not affected by the high frequency short wavelength fluctuation of the surface roughness information,but can reflect the low frequency long wavelength fluctuation of the surface profile information of the silicon wafer.At the same time,this paper studied the effect of the back surface's fluctuation state on the polished wafer's SFQR.It is found that the fluctuation state of the back surface will affect the polishing process and then affect the output after polishing,the dual-side grinding and the backside polishing,could flatten the wafer's back surface,which can get more excellent SFQR values.Wax mounting process will have a certain impact on the polished wafer's SFQR,but less obvious than the etching process.Wax mounting process with a low wafer rotation is conducive to get a thick wax film,which can make up to some extent on the fluctuation of the back surface,which is conducive to get more excellent polished wafer's SFQR.Wax mounting polishing only in a certain limit the stability of the silicon wafer to be modified,the introduction of large particles,bubbles and other impurities,the wafer's positive surface will be top up,resulting in the phenomenon of excessive polished silicon,and eventually lead to polished surface dimple defects,and the polished wafer's SFQR is poor.This also shows that the backside of the wafer will have a more significant effect on the polished wafer's SFQR.