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Research And Implementation Of Integrated Circuit Physical Self-destruct Protection Technology

Posted on:2018-10-20Degree:MasterType:Thesis
Country:ChinaCandidate:T WangFull Text:PDF
GTID:2348330512979927Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the increasing popularity of security chips as information storage, those information should be protected. As with the same time, the internal circuit structure of the chip itself as an important intellectual property rights also needs to be effectively protected. The progress of technology makes it possible for various physical attacks on the chip. In this context,the hardware security problem is becoming more and more important,and the research on hardware protection technology has become a current research hotspot.The traditional passive protection technology is so difficult to completely resist the attacks, that it easily causes the disclosure of key information. Integrated circuit physical self-destruction protection technology is an active protection technology,through the self-destruction to terminate the attack behavior, thus achieves the purpose of protecting the information security of integrated circuits, so this is the most thorough and effective protection method.The chip can be attacked for changing the operating temperature of the chip. This thesis studies a kind of physical self-destruction protection technology for anti-temperature error injection attack. This thesis firstly introduces the existing integrated circuit anti-attack protection technology, and then analyzes the principle of integrated circuit physical attack. Finally, based on TSMC 0.18?m CMOS process the physical self-destruction protection circuit was designed, that the circuit has the function of anti-temperature error injection attack, to achieve active protection.The key circuit includes the bandgap reference circuit, the comparator circuit and the charge pump circuit, in which the bandgap reference circuit adopts the high-order temperature compensation technique and the regulated cascode structure,effectively reduces the temperature coefficient and improves the supply voltage suppression ratio.The comparator circuit adopts the pre-amplified regenerative structure, which effectively improves the comparison speed and reduces the power consumption. The charge pump circuit adopts the cross-coupled cascade structure,and the PMOS tube is connected with the source electrode, which effectively reduces the threshold voltage variation and improves the charge transfer efficiency. In this thesis, the anti-temperature error injection attack can defend attack below -40 ? and above 120?. The design of the circuit simulation, temperature coefficient of bandgap reference voltage is 13.94ppm/?,and power supply voltage rejection ratio is 59.17dB; The large signal transmission delay of comparator is 0.307ns, and the small signal transmission delay is 0.403ns. The output voltage of the charge pump is 13.5V and the ripple range isą1.18%. Finally,the physical self-destruction protection system is simulated. Simulation results show,at T =-41?, the settling time is 775ns. At T = 121 ?, the settling time is 630ns. This thesis reached the purpose of damaging the key circuit in the low temperature and high temperature.
Keywords/Search Tags:Physical attack, Physical self-destruction, Anti-temperature error injection, Bandgap reference, Comparator
PDF Full Text Request
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