Research And Development Of Communication Specific Vector Processor Compiler Based On GCC

With the durative demand for high-quality mobile communication applications,mobile communication technology has undergone enormous development.Today,4G has been widely used and 5G research has achieved initial results.But it also brings new challenges.New transmission standards often lead to an increase in transmission rate,which has brought a lot of pressure to the terminal and the base station signal processing platform.The traditional base stations generally use the application specific integrated circuits which have high processing speed,but the cost is high and the flexibility is low.In order to solve the above problems,this thesis introduces a communication-specific vector processor with reference to the MIPS architecture.And a compiler for C language program plays a very important role in the development based on this proposed vector processor.This thesis completed porting the GCC compiler to a vector processor.GCC is a widely used open source compiler architecture with many advantages.Its open source features allow compiler developers to gain insight into the internal work patterns and provide possibility to modify the source code of the compiler.At the same time,GCC can also be quickly ported to different application optimization and target machine architecture.Before the porting,this thesis introduced the GCC system structure and workflow.The GCC system consists of front end,intermediate code and backend.The entire porting is focused on the backend,including modifying the source code in target macro definition file and target machine description file.Since the target system architecture affects the GCC porting,this thesis introduces the hardware structure design,instruction set design and pipeline design of the proposed vector processor.The entire porting process is based on the existing MIPS architecture supported by GCC.First of all,the register,register class,frame stack layout,and assembler output macro definitions of vector processor were added to the target machine macro file.Then,the instruction pattern and the extended pattern associated with the vector processor instruction set were defined in the target machine description file,including jump operations,store access operations,arithmetic operations and so on.Because the instruction set contains a large number of instructions,and the instruction pattern of the same type is roughly the same,thus only a few representative instructions are introduced.This thesis concludes with the necessary environment for generating the vector processor compiler and its installation flow.And then the various functions of the compiler were tested with C language test benches.Finally,the compiled files were simulated and verified in the existing simulation platform.The simulation results show that the GCC compiler has been successfully ported.