Research And Implementation On Layout Optimization For Noc In Heterogeneous Multi-core System

With the continuous improvement of IC integration, the decreasing of feature size,the rising of working frequency. The shortcomings of SoC based on bus architecture have gradually revealed, such as poor scalability, low parallelism and difficulty in global clock synchronization. In order to overcome the inherent shortcomings of SoC,the concept of Network-on-Chip (NoC) was proposed. NoC effectively solves these disadvantages in the communication architecture level, and becomes a research hotspot because of its excellent characteristics. The layout of NoC determines the distribution of nodes in the network, which affects the path length among resource nodes, traffic and hot distribution and so on. These characteristics then significantly affect the performance of system such as consumption, area, delay, QoS and so on.NoC's layout optimization is aimed at improving the performance of system,including optimization for NoC architecture and applications based on NoC. The optimization for NoC architecture includes the construction of topology, the design of routing algorithms and the exchange mechanism and so on. The optimization for applications based on NoC includes the rational allocation and mapping of the application tasks in IP-cores, and the best mapping of the IP-cores in the network according to the requirements and constrains of NoC layout to meet the needs of different performance. This thesis mainly focues on the optimization of applications based on NoC, and achieve the multi-objective layout optimization of target system.The main works of this thesis are as follow:Firstly, this thesis deeply studies an IP-cores allocation method for multi-application NoC system, and obtains communication character graphs by this method. According to the requirements and constraints in the mapping phase,multi-objective optimization models of target system were established. By balancing the demand among the optimization targets, the objective function of the multi-objective optimization for target system is obtained. Aiming at the disadvantages of the existing layout evaluation scheme, a new evaluation scheme is proposed, which is used for optimizing the layout of heterogeneous multi-core system.Secondly, this thesis builds a layout optimization platform by C++ language, which including optimization algorithm layer, task layer, control layer, network layer and statistical layer. This thesis introduces the scheme of each level implementation and work flow of the platform. The optimization algorithm layer controls the whole random search process, the task layer constructs various communication tasks flexibly according to the communication characteristic map. The platform execution process of the simulation task in the system can accurately evaluate the layout schemes.Finally, matrix experiments of different sizes are carried out in the optimized system, and compared with the stochastic layout system to evaluate the system performance after layout optimization. The experimental results show that the optimized system can improve the execution efficiencie of target system by 36.88% at best, and has lower power consumption and delay of communication.