A Method Of Magnifing Hardware Trojan's Power

With the development of science and technology,the scale of integrated circuits is expanding,the complexity of function is improving,the trend of semiconductor industry globalization is strengthening,many stages of chip designing and production is forced to separate. All of this enables the plantation of hardware trojans.Because hardware trojans are carefully designed by the designer and hardware trojans try to modify the bottom of the hardware, so it have the characteristics of good concealment,powerful destroying,hard realizing and detection and so on. In order to reply the security threats by hardware trojans.This paper mainly studies the method of magnifying the trojan's contribution to the total circuit transient power consumption.The proposed method is aimed at improving the efficiency of power-based side-channel signal analysis techniques for detection hardware trojans.Firstly, With the continuous expansion of the integrated circuit's scale,trojan circuit is relatively small,so it's power is easy to be coverd.In order to magnify trojan's power,this paper presents a method of time-sharing dominating.By the means of controlling clock network to reduce the instantaneous dynamic power,finally,the trojan's power is be magnified.The experimental data show that,when the design is divied into three banlanced module, the instantaneous dynamic power can be reduced from 100% to 30%~50% and so on. And reducing the instantaneous dynamic power really can manify trojan's power.Secondly,after deviding the design to many modules,there may be information interaction between modules.For the sake of relalizing and applicating the time-sharing mechanism,this paper put forward two schemes,the one is to insert wrapper chain and the other is a stacking-in designing mothod. The first one is sample to unstand and can be realizing by automatal process.But if there are many interactive ports,this method can cause considerable area overhead,while the second mothod can solve this question.The second method extends the design cycle by modifing the relationship between register's stack of the modules. However, this method reduces the area and delay overhead because of the inserting of wrapper chains.In the face of modules having information interaction, choosing which program needs to depend on the specific design. In the experiment, an AES encryption algorithm is be devided into ten modules again.Each module is a stacking-in structure. Each module's scale is balanced. The experimental data show that,when the design is devided into ten modules, the instantaneous dynamic power can be reduced from 100% to 10%~30% and so on,and trojan's power can be magnified better.