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Modeling Of Power Delivery Network In 3D-IC And Analysis Of Power Integrity

Posted on:2015-06-12Degree:MasterType:Thesis
Country:ChinaCandidate:H SunFull Text:PDF
GTID:2348330509960512Subject:Microelectronics and Solid State Electronics
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The emergence of 3D-IC technology for the sustainable development of the integrated circuit industry has brought new impetus, however, due to the structural characteristics of the new 3D-IC, power integrity problem becomes more significant,and restricted the 3D-IC technology applications one of the main problems. To ease the3D-IC power integrity problems arise, the need for accurate modeling of 3D PDN, and3 D PDN comprehensive time domain and frequency domain analysis in order to understand all aspects of its properties, the last of its properties under its various aspects optimized. The main work is as follows:1) 3D PDN modeling. Firstly, based on the 3D-IC TSV established a silicon substrate effect considering 3D PDN distributed model, which is the P / G(Power / Ground)TSV chip PDN model and the model components. P / G TSV existing model of the model is based on the introduction of the bump and the contact hole RLGC set the total model is established, the model can better reflect the electrical characteristics of P / G TSV pair; on-chip PDN model is based JS Pak [3] proposed a model, by conformal mapping method introduced in the silicon substrate effect unit module model established, the model can effectively react affect the electrical properties of the silicon substrate to the PDN. The experiment proved that 3D PDN model established in this paper can effectively and quickly estimate the 3D-IC PDN impedance. Secondly, according to "Rents Rule" power model [63], we propose a model to explore the nature of the current distribution. Finally, in consideration of the package, PCB PCB ? and VRM case, the paper for the 3D-IC overall PDN establish a lumped circuit model.2) 3D PDN analysis. First, in the frequency domain analysis, this paper basic Fourier analysis algorithms, based on its improved algorithm is proposed ADFT, only0.093% error of the algorithm between Hspice transient analysis, and simulation speed of at least increased 10-fold. ADFT algorithm can also take advantage of multi-core parallel analysis, greatly improving the efficiency of the algorithm.Second, in the time domain analysis, this article will join the current turn-around time algorithm for the worst noise current constraints, and use Knuth-Yao quadrangle inequality method worst noise algorithm acceleration, the time complexity of the algorithm from the drop accelerated. Finally, the analytical model based on 3D PDN distributed and lumped circuit model, we use Fourier transform algorithm and improved the worst noise algorithm to build a complete 3D PDN analysis process, which can be fully 3D PDN frequency domain analysis and the time domain. Based on this analysis process, the paper frequency domain and time-domain characteristics 3D PDN conducted a comprehensive analysis.Frequency domain characteristics analysis includes analysis of resonance phenomena, decoupling capacitance between interconnect impedance analysis and distribution layers, time domain analysis include the worst noise analysis and "overshoot" phenomenon analysis.
Keywords/Search Tags:3D-IC, modeling of 3D PDN, TSV, algorithm of Discrete Fourier Transform, algorithm of Worst-Case noise prediction
PDF Full Text Request
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