Design And Verification Of The DMA To Support Efficient Transmission In 32-bit High-Performance M-DSP

M-DSP is a high performance 32-bit DSP processor developed by our school independently, which is mainly applied to wireless communications, images, video, sonar, and many other fields. This DSP adopts very long instruction word(VLIW) technology, which make it possible to support 11 instructions issuing in one cycle, realizing high parallel SIMD technique with parallel width up to 16. What's more, the DSP supports SIMT technology with a huge demand for data. In order to give play to this high performance, the most important thing is to move the un-regular stored data of each thread in DDR3 into kernel memory quickly, which is quite challenging for today's tranmission technology. As a result, it has significant influence to study an efficient mechanism to support un-regular stored data transmission.Direct Memory Acess(DMA) is an efficient way to transfer data quickly. Based on the research and the demands of the M-DSP processor, this dissertation has designed a flexible and efficient DMA controller. The DMA supports Matrix Transmission and Multi-Base-Address Transmission, of which the Matrix Transmission is used to move regular stored date from source bank to destination bank and Multi-Base-Address Transmission deals with un-regular stored data.The main work of this article is as follows:Firstly, this dissertation introduces the function specifications and structure partition of DMA in M-DSP. The DMA has 16 configurable priority logic channels, 2 fixed priority general physical channels, it uses RAM structure to store DMA transmitting parameters and supports 8-Words wide data bus. M-DSP supports two transmission modes, which are able to transfer data with regular and non-regular placing in the source bank respectively.Secondly, this paper describes functions and design process of Matrix Transmission model of DMA in detail. Matrix Transmission is DMA's most basic and common function that moving data placed regularly from source bank to destination bank. Matrix Transmission supports 2 modes, address increasing or address unchanged.Thirdly, Multi-Base-Address Transmission has been designed. Design of Multi-Base-Transmission mode is used for transferring non-regular stored data by recombining non-regular stored data and storing them back to kernel DSP's kernel memory, with which the SIMT function is easier realized and the efficiency of using high width SIMD function is improved.Fourth, in order to verify the DMA, this dissertation builds up a DMA verification platform and proposes a method for efficient verification of DMA. The method is able to automatically adding DMA tester, automatically deciding result to be correct or not. This method has strong portability, it is able to apply to DMA's component-level and system-level verification.Lastly, this dissertation synthesized the DMA by using the RC tool. Under 40 nm process and under timing constraint of 0.4 ns, the synthesis results show that the DMA has no timing violation with the power consumption of 285.07 mw and the area of 617739um~2.Verification and synthesis results show that, the designed DMA can work correctly, and meet all timing requirements, reaching initial goal of our design.