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Research On Weighted Bit-flipping Decoding Algorithm For LDPC Codes

Posted on:2017-08-03Degree:MasterType:Thesis
Country:ChinaCandidate:Y D WangFull Text:PDF
GTID:2348330509460329Subject:Microelectronics and Solid State Electronics
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Low-density parity-check(LDPC) codes are one of linear block codes whose performance are very close to Shannon limit. LDPC codes have the advantages of simply describe, low complexity of decoding, flexible use and high speed parallel decoding, which can be widely used in areas such as deep space communication and Ethernet transmission.There are two primary decoding algorithms of LDPC codes. One is the Belief Propagation(BP) decoding algorithm, also known as the soft decoding algorithm. The other one is the Bit-Flipping(BF) decoding algorithm, also known as the hard decoding algorithm. The soft decoding algorithm has excellent performance and low error floor but with high hardware overheads. Compared with the soft decoding algorithm, the hard decoding algorithm has lower performance but higher decoding speed and low hardware overheads, which can be widely used in situations of low time delay. There are some kinds of primary hard decoding algorithms: WBF algorithm, MWBF algorithm, IMWBF algorithm, RRWBF algorithm, SMWBF algorithm, etc. After the analysis of the advantages and disadvantages of those algorithms, we first propose a multi-bits flipping algorithm with early stopping criterion. The algorithm uses a judging threshold as the flipping criterion, and will stop decoding when the value of the flipping function is lower than zero. Simulation results indicate that the algorithm can reduce the average iterative times effectively while the decoding performance has a small loss. When SNR=5.5dB, the average iterative times of the multi-flipping MWBF algorithm with early stopping decreased 68.2%. A weighted bit-flipping decoding algorithm based on updating of variable nodes is also proposed in this paper. The algorithm introduces an updating rule for variable nodes to efficiently improve the reliability of the flipped bits and reduce loops. Simulation results show that over the additive white Gaussian noise channel, at the BER of 510-, the proposed VSMWBF algorithm can achieve 0.6dB and 0.8dB gain of BER performance than the SMWBF algorithm with a small increase in computational complexity.
Keywords/Search Tags:Low-Density Parity-Check(LDPC), codes, Weighted bit-flipping decoding, Early stopping, Multi-bits Updating of variable nodes
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