Study On The Multi-level Storage And Charge Trapping Properties Of The Ga₂O₃ Thin Film

With a dramatic increase in the need for nonvolatile memory because of the prevalence of mobile gadgets, wearable devices, and cloud service systems. Today, traditional Flash memory represents the most widely nonvolatile memory due to its high density and low fabrication costs. However, it suffers from high voltages, low programming speed, and bad endurance required for the write or erase operations. Resistance random access memory?RRAM?has attracted considerable attention recently, due to it merits such as simple structure, low power consumption, low fabrication costs, fast speed,easily to be integrated and the capacity of multi-level storage, which could be serve as an electronic synapse device. In addition, charge trapping memory?CTM?, based on the improvement of Flash memory, owing to the high reliability, fast programming/erasing speed, process simplicity, and compatible with conventional CMOS?Complementary Metal Oxide Semiconductor?, has been regarded as one of most attractive candidates to replaces Flash memory. The main achievements are summarized as follow:We fabricated the Ag/Ga₂O₃/Pt/Ti/SiO₂/Si bipolar RRAM based in Pt/Ti/SiO₂/Si substrate by magnetron sputtering technique and vacuum evaporation technique. The current-voltage?I/V? characteristics curve, retention property, endurance property and conduction mechanism of the device were also discussed. The ratio of high resistance state?HRS? to low resistance state?LRS? was 140, and it can be kept 100 cycles. Meanwhile, the currents of HRS and LRS had no obvious fluctuations after 104 S. The conduction mechanisms at HRS and LRS were attributed to the filament. Moreover, we studied the multi-level resistance state by gradual resistance modulating. The study indicated, the Ag/Ga₂O₃/Pt/Ti/SiO₂/Si bipolar RRAM had a good property of multi-level storage.We prepared the CTM with structure of Au/Ga₂O₃/SiO₂/Si based in Si substrate by magnetron sputtering technique ?vacuum evaporation technique and high temperature annealing technique. We obtained the capacitance/voltage?C/V? characteristics curve of the different annealing temperature. The experiments showed that the charge trapping performance of 760? annealing was best, the memory window can be 6 V when the sweeping voltage was 13 V. The high capacitance state and low capacitance state had no obvious fluctuations after 104 S, this indicated a good retention property. Likewise, the flat band shifted weakly after 104 S. we explored the microstructure of the devices that fabricated with 600? and 760? annealed temperature by means of TEM. Different charge trapping properties were attributed to the different SiO₂ film thickness because of the diverse annealing temperature.