Font Size: a A A

A conduction model for intrinsic polycrystalline silicon thin film transistor based on discrete grains

Posted on:2010-03-29Degree:Ph.DType:Dissertation
University:Hong Kong University of Science and Technology (Hong Kong)Candidate:Chow, ThomasFull Text:PDF
GTID:1448390002983977Subject:Engineering
Abstract/Summary:
Poly-silicon thin film transistors have been studied intensively in recent years because of their potential in application of high performance active matrix display. However, due to the formation of grain boundaries along the channel, the characteristics show many differences compare with classic MOSFET devices. Difficulties were found in modeling with this grain boundary related conduction theory and no physical model can precisely and continuously describe the conduction mechanism of intrinsic channel poly-silicon thin film transistors from pseudo-subthreshold region to classical drift operation region.;A quasi two-dimensional conduction model based on the thermionic emission of charge carriers over the energy barriers at discrete grain boundaries is formulated for a polycrystalline silicon thin-film transistor with an undoped channel. Each grain boundary is characterized by an energy-dispersed density of trap states. The occupied trap states are assumed to form a "line" charge adjacent to the interface of the channel and the gate dielectric of a transistor. The electrostatic potential of a grain boundary is subsequently determined. This general approach allows the modeling of energy barriers in a transistor without deliberate channel doping and the resulting conduction model is continuously applicable from the "pseudo sub-threshold" to the "linear" regime of operation of a transistor.;While this modeling methodology is general, the analytical form is based on the observation that the trap states in a grain boundary are exponentially dispersed over the energy space defined by the energy gap of the adjacent grains. The dispersion relationship is parameterized by an energy EA. The complex mechanisms governing carrier transport in a TFT is modeled in terms of an effective "drift" mobility mueff that also accounts for the thermionic emission of charge carriers across the grain boundaries. A gate bias V pt can be identified that roughly locates the transition region between the "pseudo sub-threshold" and the "turned-on" regimes of operations.;The general extraction techniques for the extraction of device parameter have been developed. It is independent of the analytical model functional form and the length of experimental data. This extraction procedure has validated with experimental data. Model parameters of TFTs fabricated by a variety of technologies have been obtained. Three types of analytical models and corresponding parameters are obtained and summarized using this general extraction procedure. Good agreement between the experimental and the calculated transfer and output characteristics are obtained.
Keywords/Search Tags:Thin film, Transistor, Grain, Conduction model, General, Extraction
Related items