The Hardware Design Of Elliptic Curve Cryptography Over Prime Field

Noways, with the rapid development of computer network, ECC(Elliptic Curve Cryptography) has been widely used as a public key cryptography.It has become indispensable in secure applications. At the same time, the ability of computing improves to be better, RSA (Rivest Shamir Adleman), Discrete Logarithm Cryptography, etc. have been facing more challenges. However, Elliptic Curve Cryptography could provide higher security with shorter key size as a public key cryptography whose security perform higher. This thesis studies the elliptic curve cryptosystem based on the prime field, and completed the hardware design of the system.In this thesis, the design of Elliptic Curve Cryptography over prime field, selected key size P-192 NIST recommended, to implement and design a hardware circuit. Firstly, this thesis introduced the relevant theoretical basis of elliptic curve and the algorithms over prime field; Secondly it puts forword the algorithm architecture of ECC and optimize each layer of the system; Thirdly, the hardware architecture is proposed according to the corresponding technical theory architecture over prime field, and the system layers of the main algorithm is optimized; the Hardware architecture is proposed, then the function modules are divided and each module. The point multiplication uses Montgomery multiplication algorithm under standard projection coordinates, and realized with master-slave state machine controling the prime field arithmetic units. Prime field modular multiplication was impleteted in word-level way so that it provide full support to the upper units making area and speed in a compromise, and reduces the power consumption, by controlling the word length D to balance area and speed, and the entire digital signature system achieve a signature speed of 10314 times/sec eventually, which achieved the expected design target.In this thesis, Verilog HDL language is used for RTL design and function simulation is adopted in Modelsim. Finally.Finally it passed Xilinx FPGA (Field-Programmable Gate Array) prototype xcvlx240t vertification which proved that the design can completed the digital signature and verify work and data encryption and decryption correctly with reaching the speed of 10314 times/sec. The operating frequency of the hardware circuit can be up to 163.31MHz.