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The Research And Implement Of Algorithm For Fisheve Image Calibration Based On FPGA

Posted on:2017-02-12Degree:MasterType:Thesis
Country:ChinaCandidate:D X WangFull Text:PDF
GTID:2348330491962837Subject:Optical engineering
Abstract/Summary:PDF Full Text Request
Fisheye lens with its advantage of above 180° super wide-angle and panoramic sight has had significant impact on a variety of real world systems, such as video surveillance systems, intelligent transportation systems, group video conferencing systems, mobile robot visual navigation systems, and so on. However, the fisheye lens brings a strong unavoidable inherent distortion while it provides hemispherical field of view, so an image restoration algorithm is always required. Many researchers no matter at home and abroad have done a comparative sufficient theoretical research, but these algorithms are always very complex, computationally intensive, it is difficult to meet the reality system for real-time requirements in many applications. The FPGA chip has the characteristics of architecture and logical unit flexibility, high integration and the parallelism, and so on, makes the technology of image processing using FPGA chips as the core technology has been widely used in video monitoring, and achieved rapid development.In this paper, several commonly used fisheye image correction algorithm suitable for the FPGA implementation were studied. According to the comprehensive analysis of the pros and cons of various algorithm, an improved and optimized algorithm, which is fit for the characteristics of the paper, of fisheye image correction is proposed, and then carefully introduced the algorithm principle and verified with MATLAB.The Cyclone V 5CGTFD9E5F35C7N chip of Altera company is used as the core image processing chip, which correcting the distorted real-time fisheye image video data captured from the CMOS image sensors, and then displayed the real-time video with VGA interface. The logic design of the video image data acquisition module, image data storage module, the algorithm calibration module, the bilinear interpolation processing module and the VGA display module is accomplished in the Quartus Ⅱ development environment, and debugged passed using the development tools of SignalTap Ⅱ provided by the Altera company. The real-time video fisheye lens distortion correction method proposed in this paper take full advantage of the of parallelism characteristics of FPGA chips, characterized by its high speed, strong real-time performance, the real-time video fisheye lens distortion correction method provided a reference for wide field real-time video monitoring achieved using the FPGA chips.
Keywords/Search Tags:video surveillance, fisheye image, distortion correction, FPGA, Verilog HDL
PDF Full Text Request
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