Design Of Fully-Integrated Anti-Blocker Front-End In The 2.4GHz RF Receiver

Recently, the dramaticly increasing of wireless communication terminals results in the risk of receiver blocking greatly increasing, so realizing anti-blocking RF receiver is becoming an urgent problem that integrated circuit designers need to solve. The premise is that RF front-end, the first module of RF receiver, implement anti-blocking if the IF modules after RF front-end function. Therefore, the study of anti-blockering RF front-end as a guarantee of the RF receiver working properly and having good performances is of great significance.A fully-integrated anti-blocking RF front-end for 2.4GHz ISM band RF receivers is proposed in this thesis. The main parameters of RF receiver and six fully-integrated anti-blocking RF front-end architectures are introduced. The feedforward structure RF front-end is determined, after comparing the advantages and the disadvantages of the six anti-blocking RF front-end architectures. The fully-integrated anti-blocking RF front-end consists of a low-noise amplifer, an anti-blocking RF amplifier and a down-mixer. The low-noise amplifer amplifier employs the transconductance-enhance technique through a capacitive cross coupling, which reduces the noise figure and improves gain. The feedforward branch of the feedforward structure anti-blocking RF filter is formed by a RF band-stop filter based on the transparency property of passive-mixer. A passive mixing switch and a common-source amplifer comprise the load of the signal branch, which realizes the gain and phase matching between the feedforward branch and the signal branch. A two-stage high-pass impedance synthesizer designed to improve the rejection ratio in the band of RF notch filter, enhancing the rejection ratio out of band of RF anti-blocker amplifer. The down-mixer adopts the passive mixer structure, which the transimpedance stage employes the negative feedback loop to enhance the transconductance of the input transistor and discrease the input impedance of the transimpedance stage.The schematic and layout is designed in TSMC 0.13?m RFCMOS technology, and the pre and the post simulation verification are taken. The post simulation results show a reflection coefficient of -26dB, a noise figure of 5.3dB, a conversion gain in the band of 61.5dB and a rejection ratio out of the band of 42dB@20MHz, which the proposed RF front-end consumes 17mW from a 1.2V supply voltage during the 2.4GHz-2.48GHz band, which meets the requirements of the front-end for RF receivers.