Design And Implementation Of Parallel Programming Model On Embedded Multicore DSP

Traditional single processor handles sequential processing by executing one task at a time. Increasing the main frequency is the only way to gain a faster processing speed. But the maximum frequency is limited and adds more power dissipation as it increases. Multicore processor, however, provides a good performance with low frequency and low power dissipation by executing multiple tasks in parallel.As multicore processor's better performance and processing efficiency, it became a generally applied computing model in all kinds of fields, like multi-media computing, embedded devices and high performance computing and so on. There are several hot aspects, such as multicore oriented operating system, parallel programming model, parallel compiling, dynamic reconfigurable, on-chip interconnect and mutlicore multi-task scheduling. New research focuses are coming up as multicore processor technology develops.This thesis mainly studies two topics based on the multicore DSP TMS320C6678, the first one is sequential parallel programming model and the second one is inter-processor communication.First of all, this thesis designs an Open EM-based sequential parallel model and a multicore inter-processor communication method based on C6678. For the sequential parallel model, a SYS/BIOS-based scheduling model and Open EM scheduling model are studied. The sequential parallel model is proposed to provide a parallel model for multicore DSPs which is independent of operating system and ensures load balancing via fine grained multi-event scheduling. For the multicore inter-processor communication method, MCAPI(Multicore Communication API) is studied. According to the characteristics of the C6678 platform, MCAPI's message mode is designed based on an inter-processor communication mechanism Message Q which transmits data through message passing; MCAPI's channel mode is designed based on Multicore Navigator which transmits data through hardware components.Second of all, this thesis implements the sequential parallel model and MCAPI based on C6678. For the sequential parallel model, it mainly implements the overall structure, its data structures and APIs. For the multicore inter-processor communication, MCAPI's message mode is implemented using Message Q and its channel mode is implemented using Multicore Navigator facilities its sub-modules QMSS and PKTDMA.Last of all, this thesis carries out several measurements on the sequential parallel model and the implementations of MCAPI. For the sequential parallel model, an FFT(Fast Fourier Transformation) algorithm and an image dehaze algorithm are applied to verified its functionality and the statistics show a good scheduling performance which indicates its load balancing on C6678. For the implementations of MCAPI, one way transfer, round trip transfer and several other measurements are done. The results show that the Multicore Navigator-based channel mode outperforms the Message Q-based message mode communication in terms of transmit speed. However, the Message Q is much easier to setup and teardown than Multicore Navigator.