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The Design Of Rateless Decoder Driver In The Adaptive System

Posted on:2016-02-09Degree:MasterType:Thesis
Country:ChinaCandidate:R WangFull Text:PDF
GTID:2348330479454588Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
Compared with traditional communication technologies, the adaptive transmission technology can dynamically match the channel conditions, improve the spectral efficiency. Especially, the adaptive technology based on rateless codes becomes more and more popular for the excellent performance. In this paper, the adaptive transmission system is based on the rateless code. In the system, the rateless decoder located at the receiver is supposed to complete the rateless decoding. the rateless decoder is the core device of the system, its performance will directly affect the stability and throughput of the adaptive systems. This paper aims to study and design the rateless decoder drivers to meet the high throughput and high real-time requirements for the adaptive communication systems.This paper introduces the theory of the rateless decoder, and analyzes the characteristics of the decoder; then proposed a three-layer driver structure: the low-level driver interface layer, high-speed DMA transfer layer and an upper decoding control layer. The low-level driver interface layer is implemented based on WinDriver for providing a communication interface with the host; The high-speed DMA transfer layer aims to achieve a high-speed DMA transfer channels for providing a host of high-speed communication link to decoder; The upper decoding control layer implements scheduling and controlling every core of the decoders, besides, it provides the function of fault detection and recovery to guarantee the reliability.Our design is based on WinDriver, and all the drivers run in user mode, Moreover, the driver uses polling, which fully guarantee the high real-time to improve its throughput to the 300 Mbps. This driver works well in our adaptive system.
Keywords/Search Tags:Adaptive data transmission, Rateless codes, Device driver design, PCIe, DMA
PDF Full Text Request
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