A Microprocessor Instruction Set Extension Technology For Block Cipher

Block cipher can be used to ensure the confidentiality of information and it can also works with other algorithms or protocols implementing some other functions such as signature, authentication and so on. Block cipher is widely used in a variety of security protocol and plays an important role in the information security field. At present, there are over a dozen of common block cipher algorithms. Although the amount of block cipher algorithms is large but these block cipher algorithms have the same theory. Block cipher algorithms use some basic operations constitute a round function and realize the confusion and diffusion transformation from plaintext to confidential cipher text by the iteration of round function.Block cipher algorithm's common implementations are software and hardware implementation. Software implementation can achieve high flexibility but the performance is low; Hardware implementation has high performance, but the implementation needs to design hardware circuit for every special algorithms and that leads to the low flexibility. Instruction set extension is a balanced method. It can enhance the performance of block cipher operation by adding block cipher operation unit into processor and extending relevant instructions.This paper proposes an instruction set extension method for block cipher which is based on the in-depth research of microprocessor's instruction set extension technology. It uses the data trigger unit to extend the instruction set. This paper analyzes the features of different kinds of block cipher algorithms and found that four basic operations can be accelerated. Therefore, four crypto-operation units to accelerate the operations are designed. Moreover, a data trigger unit which includes the four crypto-operation units is designed and added to the microprocessor to accelerate the block cipher operations. This method has the advantages of briefness, flexibility and so on. The evaluation result shows that the modified microprocessor's speed-up ratios of AES?SM4?DES and IDEA cipher algorithms are about 2.5-8.8 and the hardware cost is only 1.8 times as large as the original microprocessor.