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Research And Development Of Channel Processing Technology Of Individual Soldier Broadband Radio

Posted on:2018-02-16Degree:MasterType:Thesis
Country:ChinaCandidate:S JiangFull Text:PDF
GTID:2346330518499004Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Due to the influence of multipath channel and Doppler effect,wireless signal has to endure serious channel fading.This paper focuses on investigating channel processing technology of individual soldier broadband radio on the basis of the characteristics of wireless channel and the principle of channel processing technology.The first part of this paper deducts the principle of channel equalization technology and analyzes the method of equalization technology to eliminate channel fading.The deduction and comparison of Zero_Force algorithm and minimum mean-squared error(MMSE)algorithm show that the MMSE algorithm makes up for the deficiency of ZF algorithm that does not estimate and analyze the noise of channel.Due to its own weakness of MMSE algorithm,this paper proposes an improved MMSE algorithmbased on least square method.The accuracy of channel estimation is greatly improved without extra expenses for the system.In the simulation,this paper compares the ZF algorithm,MMSE algorithm and improved MMSE algorithm and analyzes their network performance and features,respectively.The second part of this paper realizes the channel processing technology including DSSS,shaping filter,matching filter,bit synchronization,frequency deviation correction and channel equalization technology on FPGA chip with model XC7Z045-FFG900.Given the whole design process and the system architecture,the design of the whole system is accomplished from theory to simulation and hardwarerealization.During the hardware implementation,DSSS module,shaping filter,matching filter,bit synchronization module,frequency deviation correction module and channel equalization module are analyzed in detail.The work process of each module is explained and tested according to the structure diagram of the system,respectively,to verify the correctness of the hardware design.Finally,all modules are connected to test the performance of the whole system.The comparison of the test and simulation results is used to examine the correctness of the system design.At the end of this paper,we give the total work summary and elaborate the future plan of the research.
Keywords/Search Tags:SC_FDE, DSSS, frequency deviation correction, FPGA
PDF Full Text Request
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