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Hardware Design And Implementation Of Frenquency Variable Power Analyzer

Posted on:2019-03-27Degree:MasterType:Thesis
Country:ChinaCandidate:Z Y WuFull Text:PDF
GTID:2322330569995580Subject:Engineering
Abstract/Summary:PDF Full Text Request
Since the introduction of alternet power,human civilization has entered the era of electrification and has gained tremendous productivity.The problem of electrical energy metering and fault diagnosis is becoming increasingly apparent as the use of electrical energy becomes more common.Based on the successful research and development of the power quality analyzer of the power grid and its application,it is a hot topic for foreign instrument manufacturers to invest the relevant power analysis technology into similar test fields.For the domestic instrument research institute,the independent research and development of power analyzers with independent intellectual property rights to users of related needs is positive for both market and power analysis technologies.In this paper,after reviewing relevant data and research on foreign advanced test instruments,then summarized the specific functions of the power analyzer and pointed out the direction of development.Finally,a set of power analyzer signal acquisition and data processing was given.This article combines the technical characteristics of the power quality analyzer and then reconnects the occasion where the power analyzer is applied.It points out that the importance of synchronous sampling technology reduced the spectrum leakeage of the frequency analyze of the power quality analyzer,and proposes to apply the synchronous sampling to Power analyzer harmonic analysis function.Aiming at the specific implementation of synchronous sampling technology,this paper proposes a brand-new solution using software and hardware.The sensitivity of zero-crossing comparator is significantly increased after the FFT+FT algorithm is adopted and successfully implemented on the soft-core Microblaze built in FPGA.And then it is ensured that the phase-locked synchronous circuit operates within a wide voltage range.For the purpose of improving the sampling accuracy of the ADC in the case of variable sampling clocks,this article selects the use of an(50)-(35)ADC to complete the design,and gives the realization and description of commonly used voltage and current conditioning circuits.In addition,this article also gives a more detailed FPGA digital logic design,specifically related to the FPGA and OMAP processor data communication and the use of CRC checksum algorithm,and meet the power analyzer harmonic analysis function of high precision,low latency Implementation of Cooley-Tukey FFT algorithm and timing diagram of simulation verification.
Keywords/Search Tags:power analyzer, synchronous sampling technique, FFT+FT algorithm, CRC checksum algorithm, Cooley-Tukey FF
PDF Full Text Request
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