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Design Of Driver Fatigue Detection System Based On Zynq

Posted on:2019-03-05Degree:MasterType:Thesis
Country:ChinaCandidate:C M XinFull Text:PDF
GTID:2322330542472008Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
With the number of motor vehicles and drivers continue to increase,the traffic safety also faces more serious challenges.Fatigue driving is one of the main factors causing traffic accidents,which brings great harm to human life and property,Therefore,it is of great significance and practical value to design a system with low power consumption,small volume,high detection accuracy and good real-time performance.Based on the careful study of the existing driver fatigue detection technology at home and abroad,compared and analyzed the characteristics of various methods,this thesis chooses the vision method to extract the fatigue characteristic parameters of driver eyes and mouth,through the frequency of eyes and mouth opening and closing to determine the driver's fatigue state.The thesis based on the Xilinx Zynq SOC,using the hardware and software co-design methods,integrated driver image acquisition,eye and mouth fatigue characteristic parameters extraction,driver fatigue state judgement,HDMI display,audio alarm module in an embedded system.The system test was completed on the ZedBoard development board,and its Zynq series XC7Z020 chip was integrated with high-performance dual-core ARM Cortex-A9 processor and Xilinx 7 series FPGA logical resources.The system makes full use of the advantages of ARM in controlling and carrying operating system,and combines the strong parallel computing power of FPGA to realize the collaborative design of hardware and software.The main work of this thesis is:(1)using Vivado to build hardware project,including adding image preprocessing hardware acceleration IP core,Video image Direct Memory Access(VDMA)IP core,Video display module,audio alarm module and AXI Interconnect IP,between IP and IP connection and parameter configuration.(2)using Vi-vado high-level Synthesis tool(HLS)to design Zynq Programmable Logic(PL)which is FPGA part image preprocessing hardware acceleration IP core,mainly including gray linear transformation,Sobel edge detection the maximum between-class variance method(Otsu)binarization,Morphological closure operation and using C++ to write the text of adaboost face detection algorithm,performing the Vivado HLS simulation and hardware project test and implementing the Adaboost algorithm face detection hardware IP module(3)the Zynq Processing System(PS)which is ARM processor part implemented including the driver image acquisition,the face detection of color characteristics combining Adaboost algorithm and the tracking of kalman combining Mean Shift algorithm,eyes and mouth fatigue characteristic parameters extraction of ellipse fitting and integral projection algorithm,the driver fatigue state judgment of on the basis of the principle of PERCLOS and mouth opening and closing frequency,the dirver of VDMA IP core and image preprocessing IP core and Qt interface display and so on.The system has been tested under the actual driving environment and the laboratory environment,and the results show that the system has achieved the fatigue detection function of the driver and could give fatigue warning.The system has the characteristics of good real-time performance,low power consumption,small volume and friendly interface.
Keywords/Search Tags:Zynq, Fatigue Detection, Hardware Acceleration, High-level Synthesis, Software and Hardware Co-Design
PDF Full Text Request
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