Design And Implementation Of Fatigue Test Machine Controller Based On USB 3.0 Bus

With the development of the fatigue test,the materials should be imposed random waves which are produced in nature as true as possible,such as earthquake wave and sea wave.It puts forwards a high request for the control performance of the fatigue testing machine.Considering the high frequency and randomness of random wave,it is very important to design a controller which features high frequency in data collection,high computation speed as well as high efficiency and stability.The main purpose of this thesis is to design and implement controller of fatigue testing machine used for random wave test.In aim at some problems in current development situation in China,the proposed solution is:Using an advanced FPGA of Xilinx company as the main control unit,integrating a USB3.0 high-speed data transmission interface.Its powerful computing capacity can execute different tasks concurrently,such as measurement signal acquisition,control algorithm operation,control signal output and data upload.It makes each module work together to achieve the system control function.The work of this thesis mainly includes the following parts:1.By investigating the development of the fatigue testing machine,I summarize the current defects of domestic fatigue testing machine's controller design and put forward the overall design requirement of the proposed fatigue testing machine controller based on USB3.0,and illustrate the corresponding technical specification.After the design scheme is determined,this thesis describes the technical emphasis and difficulty in this design,including the solution of the USB3.0 interface,the implementation of the host compute and so on.2.Describe the hardware and embedded software design of the fatigue testing controller hardward based on USB3.0.In terms of hardware,it explains the function design,chip selection and circuit diagram of each module of the controller in detail.Then the PCB board is made and the whole hardware circuit is debugged.In terms of embedded software,it makes a detailed description about the logic design of each function module.The programs use the Verilog HDL hardware language,and run on a FPGA special firmware platform ISE.3.Test the function of the fatigue testing machine controller designed in this thesis.After testing the state of the controller when it is powered on,I test the performance of each function module of the system,including the USB3.0 bus interface,SSI signal acquisition module,analog signal acquisition and output module,digital signal acquisition and output module etc,then I test the control performance with a real control system in order to verify the each specification of the whole system,showing that the disign meets the system requirements and work stably.