Design Of A Spaceborne Multi-channel High-speed Data Processor

In recent years,with the rapid development of remote sensing satellite detection technology,spatial data transmission system needs real-time processing of more and more types of load,the amount of data is also growing..As the core equipment of space data transmission system,spaceborne data processor real-time processing capability restricts the development of high speed data downlink capacity.In this thesis,the data transfer processing needs in a certain type of remote sensor as the background to the field of aerospace standards guiding ideology CCSDS-AOS recommended as the theoretical basis,through the study of AOS standard system services and virtual channel multiplexing technique,the overall realization scheme of the satellite data processor is proposed,and a high speed data processor with real-time multiplexed 11-load data and 2.4 Gbps processing capacity is designed according to the scheme.In order to realize the high-speed processing of the front-end multi-channel dynamic load data,based on the development of the existing satellite data processor,this paper adopts the decision strategy based on the priority and the remaining amount of the buffer by optimizing the virtual channel dynamic scheduling management mechanism,To achieve multi-channel cache sharing and autonomous scheduling function.In order to solve the problem of buffer data overflow caused by the dynamic change of front-end data volume,this paper,based on the development of existing satellite data processor cache processing mechanism(internal FIFO plus external FIFO),through the use of high-speed,high-capacity SDRAM and FPGA Internal 64 bit FIFO parallel processing of the combination of cache processing to solve the problem facing the burst rate and multi-load data imbalance problem.In this thesis,the processing of multi-channel high-speed data processor is designed,and the function modules and data processing flow of the scheme are introduced.Through the hardware design and device selection,completed the satellite data processor hardware architecture engineering.At the same time,according to the function module analysis and data processing method selection in the scheme design,the software design and functional timing simulation of the core module of the data processor are realized by using the VHDL language.The feasibility of the design scheme is verified by analyzing the simulation results.Finally,the test results show that the multi-channel high-speed data processor can correctly realize the model demand function.The multiplex output data conforms to the CCSDS-AOS standard format and the high-speed data processing result is consistent with the theoretical design.It also shows the rationality of the virtual channel dynamic scheduling strategy and the burst data processing mechanism.The successful development of the multi-channel high-speed data processor not only meets the needs of the project,but also provides a reference for the demand of remote sensing satellite data transmission system.