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Design Of A Negative Output LDO

Posted on:2018-09-30Degree:MasterType:Thesis
Country:ChinaCandidate:Y H BaiFull Text:PDF
GTID:2322330512489839Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the development of consumer electronics and industry,the role of integrated chips are more important.Energy increasingly tense,the green use of energy is also favored by the industry.In recent years,to lower the output noise and system power consumption technology is under more extensive research.Traditional LDO's output capacitor can be used to frequency compensation,reduce the output noise and provide energy to load at transient time.So compared to LDO with output capacitor,transient response and frequency compensation are big difficulties in designing LDO without capacitor.In order to design a negative output LDO with output capacitor,this paper analyzes the basic framework and working mechanism of traditional LDO,and then introduces the parameters of LDO in detail.Then we introduce the system noise model of LDO,and introduce some existing technologies that can reduce LDO output noise.Based on this,this paper presents another improved reference amplifier to lower noise and current.The working principle and noise characteristics of this circuit are analyzed in detail.Compared to the existing several driving methods,this paper presents a combination of Darlington and anti-Widlar circuit as the driving circuit,to reduce the power consumption and then to enhance the efficiency of the LDO.We design a low-noise,low-power,negative-output LDO.The design is based on bipolar process.The circuit contains an IPTAT bias module,a reference amplifier module,a buffer stage module,overcurrent protection and startup circuit module.Based on the 2um BJT process of NO.24 research institute of CETC,the whole circuit is simulated.The simulation results show that the static power consumption is 44.08 uA,the LDO output noise is 237.5?VRMS without bypass capacitor,and the circuit output noise is reduced to 20.6?VRMS after adding a bypass capacitor.When the load changes between 20 mA and 200 mA,the changes of output voltage does not exceed 200 mV.After careful simulation verification,the circuit linear adjustment rate and other parameters have reached the requirements of the system indicators,and the circuit can work properly.
Keywords/Search Tags:LDO, reference amplifiers, reverse Widlar, low noise, low power consumption
PDF Full Text Request
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