Design And Implementation On See Radiation-hardened -200V P Channel Power MOS

With the rapid development of the spacecraft,the user's demand for Power MOS which needed in power system increases year by year.The power MOS devices need to withstand the effects of space radiation in space environment,the space radiation sources include three aspects: Galactic Cosmic Rays,Solar Cosmic Rays and Vallen Zone.These rays or the region will cause the effect of Charge and Discharge Effect,Total Dose Effect,Single Event Effect,etc and have serious harm on spacecraft.The P-channel power MOS devices are widely used for single power supply applications and push-pull circuit applications,because the design of gate driver is simple than N channel device.In the event of Single Event Effect,it will cause the increasing power consumption which cut short device's life or burn out the device which lead to severe spacecraft power system oscillation and even result in power failure or fire.The single event effect(SEE)including Single Event Burned(SEB)and Single Event Gate Rupture(SEGR)will happen between P-channel Power and N-channel MOS devices.In this thesis,the spacecraftin space applications under the environment of Power MOS transistor as the research object.After the discuss of the radiation hardeningbasic theory,the hardening design and implementation of single event burnedandsingle event gate rupturefor-200 V P-channel power MOS are discussed and researched detaily.Themain contents are:1.Researcha method for the hardening of single event burned,propose a cell structure of P channel power MOS device which reduce parasitic transistor sensitivity for SEB.The structure by reducing the parasitic transistor base resistance and reducing the emission efficiency,prevent the parasitic transistor from conducting in the SEE,so as to realize blocking state when single particle injected to the device,which is to ensure that the device can withstand voltage when single particle injected to the device.2.Researcha method for the reinforcement of single event gate rupture,propose a gate structureusing complex dielectric material.The manufacture process include the first layer of silicon dioxide layer,the second layer of silicon nitride.By using the different features of two kinds of materialsto ensure the threshold voltage of the device,and to increase the gate dielectric insulation intensity,in order to prevent the single event gate rupture from the single particle injected to the device,so asto ensure the insulation state of the gate,which is to ensure the gate controllable and effective after the single particle injected to the device.3.Through the wafer processing,packaging,testing,screening,prepare five devices for SEE experiment in Institute of modern physics,Chinese Academy of Sciences.Through the analysis of experiment results,optimization the design and the process conditions,the area of safe operation(SOA)satisfy the application standard for device of aerospaces.