FPGA Implementation Of Closed Caption Decoding And Display System

Closed Caption(Closed Caption, CC) is the indispensable part of digital TV in the European and American and also is an important part in professional video monitor, the initial idea of which is to make the hearing disabled people can have more video information like normal person in order to achieve more perfect video viewing experience. In general, Closed Caption decoding and display system adopts special decoding chip or software to implement, but with the popularity of high definition video and the development of electronic technology, the market puts forward higher request for video data processing speed and system integration, the implementation scheme of traditional Closed Caption becomes more and more difficult to meet these requirements. The field programmable gate array(FPGA) has a strong ability of parallel data processing which integrates rich hardware resources and is especially suitable for real-time processing of mass data with great superiority in the field of video image processing.The purpose of this paper is to design a Closed Caption decoding and display system based on FPGA. The system meets the demand of high integration level and fast processing speed at the same time, and it has the advantages of good real-time performance, low resource consumption, saving cost and high commercial value as well. Therefore, the FPGA scheme to realize the Closed Caption system has a far-reaching practical significance.The system regards the Closed Caption decoding and display function of the professional video monitor in the North American market as the application background, and further studies some relevant agreements in SMPTE standards which relate to the data’s grammatical structure of the Closed Caption. At the same time, a superposition method of character to be displayed is proposed and applied. It realizes the captions window positioning, the location of area which captions characters are displayed in and the confirmation of the character base address of area which captions characters are displayed in. It also can read the font data and realize the division of area which the captions window is displayed in. On this basis, combined with the characteristics of the FPGA parallel processing data, this paper proposes a method of extracting closed captions raw data based on the high definition SDI video signal which realizes the extraction of Closed Caption raw data, and then restructures the digital television Closed Caption(DTVCC) packets, followed by the restructuring of the caption service data, and then decodes the caption service data selected by user, and finally realizes the overlay display of the Closed Caption source data and video. The whole design uses the Verilog HDL hardware description language to carry on the programming, and is implemented on the Kintex7 FPGA development board with the core chip of XC7K325T-2FFG900 made by Xilinx Company.System test results show that the function of the Closed Caption decoding and display system has reached the goal designed in advance. The system can extract the original Closed Caption data and do further decoding processing, finally the image overlay display with the source video was normal, system ran stably and achieved very good display effect. The system has less system resources consumption and can use rich resources that FPGA handles video to realize the Closed Caption function. It has good practical application value.