A Novel Memory Blockmanagement Scheme For PCM Using WOM-Code

The trends of multi-core processors and increasing application complexity have put a tremendous pressure on the performance of main memory. However, traditional DRAM technology faces serious challenges in high power consumption and poor scalability, which makes DRAM less suitable for the next generation main memory.Of the non-volatile memory candidates, Phase Change Memory (PCM) offers better read latency than resistive RAM (ReRAM) and higher cell density than spin-transfer-torque RAM (STT-RAM). PCM is an asymmetricalread-write technology which leads to a higher write latency than that of DRAM. For general-purpose applications, an extensive study has shown that the long write latency in PCM may result in as much as above 50% performance degradation. Thus, the long write latency inherent to PCM remains the biggest challenge that has to overcome in order to realize scalable PCM memory. PCM is possible to be main memory if solving the slow write latency problem.Since the write latency of SET and RESET operation of PCM is asymmetric, the much slower SET operation determines the write latency. Recent study has shown that applying the write-once-memory-code (WOM-code) to PCM enables RESET-only writes when the memory rows are written back to PCM, which helps to reduce the write latency effectively. Whereas applying WOM-code to PCM significantly reduces the write latency, it comes at the overhead of huge memory capacity. In this paper, based on the memory organization that a small WOM-Buffer attached with the original PCM, we propose a novel memory block management scheme implemented at memory controller to apply WOM-code only to write-intensive memory blocks, which can significantly reduce write latency with less PCM capacity overhead.Original-PCM and WOM-Buffer manages PCM memory in Original-Block and WOM-Block respectively. WOM-Buffer is 16-way set-associative to Original-PCM.Experiments show that our memory block management scheme really reduces write latency of PCM with only little PCM capacity overhead.