| With the rapid development of the global economy, information technology has been widely used, but the security situation is very grim. In recent years, a lot of security issues were broke especially in the IC industry. Especially, the damage caused by the Hardware Trojans is particularly serious. In order to change this passive situation, it is very necessary to research the Hardware Trojans.Therefore, this paper establishes the doped modified Hardware Trojans IC design system, and studies the design of the Hardware Trojans horse based on the system. Firstly, the paper makes modeling and simulation of the underlying device using TCAD tools, and builds up the basic circuit using the underlying device model. Then the paper completes the Hardware Trojans standard cell design and physical information extraction. Lastly, the Hardware Trojans design is combined with the standard IC design process, which completes hardware AES Trojan circuit design. The main contents are as follows:Firstly, this paper describes in detail the Hardware Trojans definition, characteristics, classification and detection method etc. According to the current status of Hardware Trojans, the paper gives doping modification of Hardware Trojans feasibility analysis, and establishes the doping Modification Hardware Trojans IC design system. The paper descripts the thesis in accordanc with the system.Secondly, based on the theoretical analysis of the doped modified Hardware Trojans, the paper builds the device models which are simulated by using the related tools and the simulation results are analyzed and modified. Using the basic model to build "one" Trojans circuit and the "zero" Hardware Trojans mixed circuit simulation, the output characteristics were simulated Hardware Trojans device in the circuit.Thirdly, the paper establishes the standard cell schematic conversion platform, according to the principle diagram of the connection between the cell of the output part of the modification, the paper finally completes the combination of units and timing of units and special units of the three different types of Hardware Trojans cell layout, and layout of Trojans cell DRC and LVS detection. The physical information is extracted by the physical information of the Haedware Trojans standard unit which is physical verification.Fourthly, the Hardware Trojans design and standard IC design process combined. The completion of the first target circuit for RTL code writting and functional verification, and through logic synthesis to obtain gate- level netlist, the Trojan units are replaced by the script language; and then modify the standard unit of the verilog models are to simulate the function of Hardware Trojans unit. The influence of Hardware Trojans unit is verified on the circuit by simulation; secondly the AES Trojan circuit of physical design, completion of the DRC and LVS detection, and timing simulation, finally completing the AES Trojan circuit random testing. |
