The Analysis And Verification Of Direct Memory Access Controller Based On AHB

With the continuous development and application of the semiconductor technology, the System On Chip(SOC) which based on the intellectual property reuse and platform design became the development direction of today’s large-scale integrated circuit. Direct memory access is a method been used to directly transact amounts of data between SOC modules, the transaction of data between memory and memory, memory and peripheral is achieved under control of a direct memory access controller(DMAC). CPU can doing other operations during data transfer in parallel, which can be liberated from large amounts of data exchange, distributed data collection and slow device access, resulting in improved CPU utilization, thereby increasing the overall system performance. Intelligent and channelizing is the development trend of DMAC for the moment.In this thesis, after in-depth understanding of AHB bus protocol and DMA technology, analysis a design concept of a DMAC, which can be integrated into an AHB bus based SOC. As more and more modules can be integrated in SOC, the DMAC in this thesis contains eight programmable DMA channels, which can handle multiple DMA transfer request. Since the data is transmitted on the AHB bus, the DMAC in this thesis contains one AHB slave interface for CPU access and two AHB master interface for the receive and send of DMA data, which also support multi-layer AHB bus. This DMAC supports both hardware and software DMA request, and multiple peripherals can issues DMA requests in one time. Peripherals communication is achieved by DMAC hardware handshake mechanism, and interrupt is issued through interrupt logic. In order to adapt several transmission cases, the DMAC supports multiple transfer modes, multiple data width and multiple burst transfer types. In order to improve the transmission efficiency, the DMAC set data block as the basic unit, and support efficient scatter/gather DMA mode.In the entire design process of SOC, verification account for a large proportion. Based on the existing SOC verification simulation, this thesis introduced a hardware and software corporated chip level verification method. Propose function verification point according to the function of the DMAC, and then write the corresponding test case to run function simulation. By analyzing the simulation waveforms, the results show the DMAC can achieve the desired functionality, and can efficiently control the data transfer between various modules on SOC bus. Final conclusion of this thesis is the DMAC can be well integrated into AMBA bus based SOC, and SOC with this DMAC can greatly increase the data processing capability.