Research On CCD Singal Processing Circuit Of Triple Hardware-interpolation Based On FPGA

Linear CCD imaging with triple hardware-interpolation is a technology using three linear CCD splicing to improve the spatial resolution of the CCD. This paper designs a linear CCD signal processing circuit of triple hardware-interpolation on the basis of fully researching triple hardware-interpolation imaging theory, and using FPGA to complete the work of signal acquisition and image reconstruction of the whole system. The signal acquisition method of using the analog multiplexer to realize the three linear CCD synchronous sampling proposed in this paper, makes the image acquisition and conversion complete within one CCD Integration time. In the image information transmission, reconstruction and storage link, regroup the mixed signal output from the ADC according to different CCD, cache a frame signal output from the CCD into internal RAM of the FPGA, and mark the frame number, the image reconstruct module check whether the frame is valid according to the frame number, calculate the position of frame information in the image reconstruct generating corresponding address of data in the SDRAM at the same time, the CCD signal acquisition completed while completing the reconstruction of the image, achieving the effect of real-time processing. Moreover, this paper does the simulation test of triple hardware-interpolation imaging process, and compare the image quality of this method with traditional software-interpolation, verifying the conclusions of the image quality of triple hardware-interpolation reconstruct method is better than that of soft-interpolation.