| Beidou satellite navigation system, as China’s independent development and independent running global satellite navigation system, can provide precise navigation and timing services to users, Widely application in transportation, communications, electricity, weather, marine, defense and other aspects, Its application and development have a significant impact on China’s economic and social benefits. In the practical application of the navigation system, the receiver is often used. Under normal circumstances there will be many signal in the receiver, in addition to the useful signal, the interference, noise and environmental changes will make the signal fluctuates, impacting the back-end processing signals, Therefore a system called automatic gain control(AGC) is need, which can adjust the gain of the receiver system automatically and has wide dynamic gain range, adjusting the signal of the system so that it can transmit the signal stably.Because of the weak satellite signal power and large dynamic range, this paper designed a wide-dynamic digital feedback AGC chip, which includes programmable gain amplifier(PGA), 2-bit dynamic analog to digital converter(ADC) and digital encoder(Decoder) that can output digital control signal. Programmable gain amplifier used the grading optional amplifier structure so that the gain of every amplifier can be individually tested and adjusted, the core circuit consists of the cross-coupling cascode amplifier and current-feedback amplifier, in addition, this paper designed a new switching-control structure, improving the bandwidth, accuracy and linearity of the system while reducing power consumption and the number of the control switch. ADC used a dynamic differential flash structure, reducing the power dissipation effectively. digital-control AGC commonly used DSP for processing signal, then the feedback-control signal adjusted the PGA, due to the response time is too long and the DSP resource consumption is too large of this type, this paper designed a feedback control unit composed of the MOS transistor which is called Decoder, saving DSP resources, speeding up the response speed, simplifying the structure so that the integration is more easier.In this paper, the proposed wide-dynamic digital feedback AGC chip was implemented and verified with Global Foundry 180 nm CMOS process, included front-end circuit design and back-end physical layout. Post-layout-simulation results show that with a supply voltage of 1.8V, the maximum gain of the PGA is 63 d B, the gain dynamic range varies from 0 to 63 d B, the stepping gain is 1d B, the gain error is less than ±0.45 d B; the minimum-3d B bandwidth of this AGC chip is 28 MHz, current consumption is 2.2m A, input IP3 is 31.6-45.8d Bm, input equivalent noise is 26.22 Hzn V. It is demonstrated that the designed automatic gain control chip can meet the harsh requirement for sensitivity and dynamic range of the advanced Beidou receiver system, ensuring the signal transmits stably. |
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